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Tsirkin" To: Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= Cc: qemu-devel@nongnu.org, Bernhard Beschow , Laurent Vivier , Thomas Huth , BALATON Zoltan , Ani Sinha , qemu-block@nongnu.org, Marcel Apfelbaum , Eduardo Habkost , John Snow , Paolo Bonzini , Igor Mammedov , Richard Henderson , Mark Cave-Ayland Subject: Re: [PATCH v2 00/15] hw/southbridge: Extract ICH9 QOM container model Message-ID: <20240312124845-mutt-send-email-mst@kernel.org> References: <20240226111416.39217-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240226111416.39217-1-philmd@linaro.org> Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.687, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Mon, Feb 26, 2024 at 12:13:59PM +0100, Philippe Mathieu-Daudé wrote: > Since v1 [1]: > - Rebased on top of Bernhard patches > - Rename files with 'ich9_' prefix (Bernhard) > > Hi, > > I have a long standing southbridge QOM rework branches. Since > Bernhard is actively working on the PIIX, I'll try to refresh > and post. This is also motivated by the Dynamic Machine work > where we are trying to figure the ideal DSL for QEMU, so having > complex models well designed help. > > Here we introduce the ICH9 'southbridge' as a QOM container. > Since the chipset comes as a whole, we shouldn't instantiate > its components separately. However in order to maintain old > code we expose some properties to configure the container and > not introduce any change for the Q35 machine. There is no > migration change, only QOM objects moved around. > > More work remain in the LPC function (more code to remove from > Q35). Maybe worth doing in parallel with the PIIX to clean both > PC machines. Bernhard had some comments so I hope you'll address them so I can merge - after the release presumably. > Also we'd need to decouple the cpu_interrupt() calls between hw/ > and target/. > > Note that GSI is currently broken [2]. Once the LPC/ISA part is > done, it might be easier to fix it. > > [1] https://lore.kernel.org/qemu-devel/20240219163855.87326-1-philmd@linaro.org/ > [2] https://lore.kernel.org/qemu-devel/cd0e13c6-c03d-411f-83a5-1d4d28ea4345@linaro.org/ > > Philippe Mathieu-Daudé (15): > MAINTAINERS: Add 'ICH9 South Bridge' section > hw/i386/q35: Add local 'lpc_obj' variable > hw/acpi/ich9: Restrict definitions from 'hw/southbridge/ich9.h' > hw/acpi/ich9_tco: Include 'ich9' in names > hw/acpi/ich9_tco: Restrict ich9_generate_smi() declaration > hw/ide: Rename ich.c -> ich9_ahci.c > hw/i2c/smbus: Extract QOM ICH9 definitions to 'ich9_smbus.h' > hw/pci-bridge: Extract QOM ICH definitions to 'ich9_dmi.h' > hw/southbridge/ich9: Introduce TYPE_ICH9_SOUTHBRIDGE stub > hw/southbridge/ich9: Add the DMI-to-PCI bridge > hw/southbridge/ich9: Add a AHCI function > hw/southbridge/ich9: Add the SMBus function > hw/southbridge/ich9: Add the USB EHCI/UHCI functions > hw/southbridge/ich9: Extract LPC definitions to 'hw/isa/ich9_lpc.h' > hw/southbridge/ich9: Add the LPC / ISA bridge function > > MAINTAINERS | 21 +- > include/hw/acpi/ich9.h | 15 ++ > include/hw/acpi/ich9_tco.h | 6 +- > include/hw/i2c/ich9_smbus.h | 25 +++ > include/hw/isa/ich9_lpc.h | 166 +++++++++++++++ > include/hw/pci-bridge/ich9_dmi.h | 20 ++ > include/hw/southbridge/ich9.h | 235 +--------------------- > hw/acpi/ich9.c | 9 +- > hw/acpi/ich9_tco.c | 5 +- > hw/i2c/{smbus_ich9.c => ich9_smbus.c} | 36 +++- > hw/i386/acpi-build.c | 1 + > hw/i386/pc_q35.c | 126 +++--------- > hw/ide/{ich.c => ich9_ahci.c} | 0 > hw/isa/{lpc_ich9.c => ich9_lpc.c} | 37 +++- > hw/pci-bridge/{i82801b11.c => ich9_dmi.c} | 11 +- > hw/southbridge/ich9.c | 213 ++++++++++++++++++++ > tests/qtest/tco-test.c | 2 +- > hw/Kconfig | 1 + > hw/i2c/meson.build | 2 +- > hw/i386/Kconfig | 3 +- > hw/ide/meson.build | 2 +- > hw/isa/meson.build | 2 +- > hw/meson.build | 1 + > hw/pci-bridge/meson.build | 2 +- > hw/southbridge/Kconfig | 11 + > hw/southbridge/meson.build | 3 + > 26 files changed, 587 insertions(+), 368 deletions(-) > create mode 100644 include/hw/i2c/ich9_smbus.h > create mode 100644 include/hw/isa/ich9_lpc.h > create mode 100644 include/hw/pci-bridge/ich9_dmi.h > rename hw/i2c/{smbus_ich9.c => ich9_smbus.c} (77%) > rename hw/ide/{ich.c => ich9_ahci.c} (100%) > rename hw/isa/{lpc_ich9.c => ich9_lpc.c} (95%) > rename hw/pci-bridge/{i82801b11.c => ich9_dmi.c} (95%) > create mode 100644 hw/southbridge/ich9.c > create mode 100644 hw/southbridge/Kconfig > create mode 100644 hw/southbridge/meson.build > > -- > 2.41.0