From: Chinmay Rath <rathc@linux.ibm.com>
To: qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, npiggin@gmail.com, danielhb413@gmail.com,
clg@kaod.org, richard.henderson@linaro.org,
peter.maydell@linaro.org, harshpb@linux.ibm.com,
sbhat@linux.ibm.com
Subject: [PATCH v2 0/2] Moving fp arithmetic insns to decodetree.
Date: Fri, 15 Mar 2024 12:14:20 +0530 [thread overview]
Message-ID: <20240315064422.737812-1-rathc@linux.ibm.com> (raw)
This patch series moves floating-point arithmetic instructions from
legacy to decodetree format. The first patch consolidates the common
behaviour of floating-point helper functions using macros, reducing
code duplication. The second patch moves all the floating arithmetic
instructions to decodetree.
Change log :
v2 : Addressed review comments on v1
v1 : https://lore.kernel.org/qemu-devel/20240307110318.170319-1-rathc@linux.ibm.com/
Chinmay Rath (2):
target/ppc: Merge various fpu helpers
target/ppc: Move floating-point arithmetic instructions to decodetree.
target/ppc/helper.h | 44 ++---
target/ppc/insn32.decode | 42 +++++
target/ppc/fpu_helper.c | 235 +++++++-----------------
target/ppc/translate/fp-impl.c.inc | 285 +++++++++++------------------
target/ppc/translate/fp-ops.c.inc | 31 ----
5 files changed, 242 insertions(+), 395 deletions(-)
--
2.39.3
next reply other threads:[~2024-03-15 6:45 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-15 6:44 Chinmay Rath [this message]
2024-03-15 6:44 ` [PATCH v2 1/2] target/ppc: Merge various fpu helpers Chinmay Rath
2024-03-20 5:03 ` Nicholas Piggin
2024-03-15 6:44 ` [PATCH v2 2/2] target/ppc: Move floating-point arithmetic instructions to decodetree Chinmay Rath
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