From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, "BALATON Zoltan" <balaton@eik.bme.hu>,
qemu-stable@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>
Subject: [PULL 1/2] hw/isa/vt82c686: Keep track of PIRQ/PINT pins separately
Date: Mon, 15 Apr 2024 16:55:04 +0200 [thread overview]
Message-ID: <20240415145506.48179-2-philmd@linaro.org> (raw)
In-Reply-To: <20240415145506.48179-1-philmd@linaro.org>
From: BALATON Zoltan <balaton@eik.bme.hu>
Move calculation of mask after the switch which sets the function
number for PIRQ/PINT pins to make sure the state of these pins are
kept track of separately and IRQ is raised if any of them is active.
Cc: qemu-stable@nongnu.org
Fixes: 7e01bd80c1 hw/isa/vt82c686: Bring back via_isa_set_irq()
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240410222543.0EA534E6005@zero.eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/isa/vt82c686.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index aa91942745..8582ac0322 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -658,7 +658,7 @@ void via_isa_set_irq(PCIDevice *d, int pin, int level)
ViaISAState *s = VIA_ISA(pci_get_function_0(d));
uint8_t irq = d->config[PCI_INTERRUPT_LINE], max_irq = 15;
int f = PCI_FUNC(d->devfn);
- uint16_t mask = BIT(f);
+ uint16_t mask;
switch (f) {
case 0: /* PIRQ/PINT inputs */
@@ -673,6 +673,7 @@ void via_isa_set_irq(PCIDevice *d, int pin, int level)
}
/* Keep track of the state of all sources */
+ mask = BIT(f);
if (level) {
s->irq_state[0] |= mask;
} else {
--
2.41.0
next prev parent reply other threads:[~2024-04-15 14:56 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-15 14:55 [PULL 0/2] Misc HW patches for 2024-04-15 Philippe Mathieu-Daudé
2024-04-15 14:55 ` Philippe Mathieu-Daudé [this message]
2024-04-15 14:55 ` [PULL 2/2] hw/pci-host/ppc440_pcix: Do not expose a bridge device on PCI bus Philippe Mathieu-Daudé
2024-04-16 10:41 ` [PULL 0/2] Misc HW patches for 2024-04-15 Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240415145506.48179-2-philmd@linaro.org \
--to=philmd@linaro.org \
--cc=balaton@eik.bme.hu \
--cc=jiaxun.yang@flygoat.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=qemu-stable@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).