From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH 39/45] target/hppa: Drop tlb_entry return from hppa_get_physical_address
Date: Wed, 24 Apr 2024 17:00:17 -0700 [thread overview]
Message-ID: <20240425000023.1002026-40-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240425000023.1002026-1-richard.henderson@linaro.org>
The return-by-reference is never used.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/cpu.h | 3 +--
target/hppa/int_helper.c | 2 +-
target/hppa/mem_helper.c | 19 ++++---------------
target/hppa/op_helper.c | 3 +--
4 files changed, 7 insertions(+), 20 deletions(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 629299653d..5f3e99cdc4 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -377,8 +377,7 @@ bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
void hppa_cpu_do_interrupt(CPUState *cpu);
bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req);
int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
- int type, hwaddr *pphys, int *pprot,
- HPPATLBEntry **tlb_entry);
+ int type, hwaddr *pphys, int *pprot);
void hppa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
vaddr addr, unsigned size,
MMUAccessType access_type,
diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c
index 97e5f0b9a7..b82f32fd12 100644
--- a/target/hppa/int_helper.c
+++ b/target/hppa/int_helper.c
@@ -167,7 +167,7 @@ void hppa_cpu_do_interrupt(CPUState *cs)
vaddr = hppa_form_gva_psw(old_psw, env->iasq_f, vaddr);
t = hppa_get_physical_address(env, vaddr, MMU_KERNEL_IDX,
- 0, &paddr, &prot, NULL);
+ 0, &paddr, &prot);
if (t >= 0) {
/* We can't re-load the instruction. */
env->cr[CR_IIR] = 0;
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index 5eca5e8a1e..3ef9e80064 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -196,18 +196,13 @@ static int match_prot_id64(CPUHPPAState *env, uint32_t access_id)
}
int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
- int type, hwaddr *pphys, int *pprot,
- HPPATLBEntry **tlb_entry)
+ int type, hwaddr *pphys, int *pprot)
{
hwaddr phys;
int prot, r_prot, w_prot, x_prot, priv;
HPPATLBEntry *ent;
int ret = -1;
- if (tlb_entry) {
- *tlb_entry = NULL;
- }
-
/* Virtual translation disabled. Map absolute to physical. */
if (MMU_IDX_MMU_DISABLED(mmu_idx)) {
switch (mmu_idx) {
@@ -237,10 +232,6 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
goto egress;
}
- if (tlb_entry) {
- *tlb_entry = ent;
- }
-
/* We now know the physical address. */
phys = ent->pa + (addr - ent->itree.start);
@@ -349,7 +340,7 @@ hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
cpu->env.psw & PSW_W ? MMU_ABS_W_IDX : MMU_ABS_IDX);
excp = hppa_get_physical_address(&cpu->env, addr, mmu_idx, 0,
- &phys, &prot, NULL);
+ &phys, &prot);
/* Since we're translating for debugging, the only error that is a
hard error is no translation at all. Otherwise, while a real cpu
@@ -431,7 +422,6 @@ bool hppa_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
{
HPPACPU *cpu = HPPA_CPU(cs);
CPUHPPAState *env = &cpu->env;
- HPPATLBEntry *ent;
int prot, excp, a_prot;
hwaddr phys;
@@ -447,8 +437,7 @@ bool hppa_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
break;
}
- excp = hppa_get_physical_address(env, addr, mmu_idx,
- a_prot, &phys, &prot, &ent);
+ excp = hppa_get_physical_address(env, addr, mmu_idx, a_prot, &phys, &prot);
if (unlikely(excp >= 0)) {
if (probe) {
return false;
@@ -689,7 +678,7 @@ target_ulong HELPER(lpa)(CPUHPPAState *env, target_ulong addr)
int prot, excp;
excp = hppa_get_physical_address(env, addr, MMU_KERNEL_IDX, 0,
- &phys, &prot, NULL);
+ &phys, &prot);
if (excp >= 0) {
if (excp == EXCP_DTLB_MISS) {
excp = EXCP_NA_DTLB_MISS;
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c
index 66cad78a57..7f79196fff 100644
--- a/target/hppa/op_helper.c
+++ b/target/hppa/op_helper.c
@@ -334,8 +334,7 @@ target_ulong HELPER(probe)(CPUHPPAState *env, target_ulong addr,
}
mmu_idx = PRIV_P_TO_MMU_IDX(level, env->psw & PSW_P);
- excp = hppa_get_physical_address(env, addr, mmu_idx, 0, &phys,
- &prot, NULL);
+ excp = hppa_get_physical_address(env, addr, mmu_idx, 0, &phys, &prot);
if (excp >= 0) {
cpu_restore_state(env_cpu(env), GETPC());
hppa_set_ior_and_isr(env, addr, MMU_IDX_MMU_DISABLED(mmu_idx));
--
2.34.1
next prev parent reply other threads:[~2024-04-25 0:06 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-24 23:59 [PATCH 00/45] target/hppa: Misc improvements Richard Henderson
2024-04-24 23:59 ` [PATCH 01/45] target/hppa: Move cpu_get_tb_cpu_state out of line Richard Henderson
2024-04-24 23:59 ` [PATCH 02/45] target/hppa: Use hppa_form_gva_psw in hppa_cpu_get_pc Richard Henderson
2024-04-24 23:59 ` [PATCH 03/45] target/hppa: Move constant destination check into use_goto_tb Richard Henderson
2024-04-24 23:59 ` [PATCH 04/45] target/hppa: Pass displacement to do_dbranch Richard Henderson
2024-05-13 11:41 ` Philippe Mathieu-Daudé
2024-04-24 23:59 ` [PATCH 05/45] target/hppa: Allow prior nullification in do_ibranch Richard Henderson
2024-04-24 23:59 ` [PATCH 06/45] target/hppa: Use CF_BP_PAGE instead of cpu_breakpoint_test Richard Henderson
2024-04-24 23:59 ` [PATCH 07/45] target/hppa: Add install_iaq_entries Richard Henderson
2024-04-24 23:59 ` [PATCH 08/45] target/hppa: Add install_link Richard Henderson
2024-04-24 23:59 ` [PATCH 09/45] target/hppa: Delay computation of IAQ_Next Richard Henderson
2024-04-24 23:59 ` [PATCH 10/45] target/hppa: Skip nullified insns in unconditional dbranch path Richard Henderson
2024-04-24 23:59 ` [PATCH 11/45] target/hppa: Simplify TB end Richard Henderson
2024-04-24 23:59 ` [PATCH 12/45] target/hppa: Add IASQ entries to DisasContext Richard Henderson
2024-04-24 23:59 ` [PATCH 13/45] target/hppa: Add space arguments to install_iaq_entries Richard Henderson
2024-04-24 23:59 ` [PATCH 14/45] target/hppa: Add space argument to do_ibranch Richard Henderson
2024-04-24 23:59 ` [PATCH 15/45] target/hppa: Use umax in do_ibranch_priv Richard Henderson
2024-04-24 23:59 ` [PATCH 16/45] target/hppa: Always make a copy " Richard Henderson
2024-04-24 23:59 ` [PATCH 17/45] target/hppa: Introduce and use DisasIAQE for branch management Richard Henderson
2024-04-24 23:59 ` [PATCH 18/45] target/hppa: Use displacements in DisasIAQE Richard Henderson
2024-04-24 23:59 ` [PATCH 19/45] target/hppa: Rename cond_make_* helpers Richard Henderson
2024-04-24 23:59 ` [PATCH 20/45] target/hppa: Use TCG_COND_TST* in do_cond Richard Henderson
2024-04-24 23:59 ` [PATCH 21/45] target/hppa: Use TCG_COND_TST* in do_log_cond Richard Henderson
2024-04-25 0:00 ` [PATCH 22/45] target/hppa: Use TCG_COND_TST* in do_unit_zero_cond Richard Henderson
2024-04-25 0:00 ` [PATCH 23/45] target/hppa: Use TCG_COND_TST* in do_unit_addsub Richard Henderson
2024-04-25 0:00 ` [PATCH 24/45] target/hppa: Use TCG_COND_TST* in trans_bb_imm Richard Henderson
2024-04-25 0:00 ` [PATCH 25/45] target/hppa: Use registerfields.h for FPSR Richard Henderson
2024-04-25 0:00 ` [PATCH 26/45] target/hppa: Use TCG_COND_TST* in trans_ftest Richard Henderson
2024-04-25 0:00 ` [PATCH 27/45] target/hppa: Remove cond_free Richard Henderson
2024-04-25 0:00 ` [PATCH 28/45] target/hppa: Introduce DisasDelayException Richard Henderson
2024-04-25 0:00 ` [PATCH 29/45] target/hppa: Use delay_excp for conditional traps Richard Henderson
2024-04-25 0:00 ` [PATCH 30/45] target/hppa: Use delay_excp for conditional trap on overflow Richard Henderson
2024-04-25 0:00 ` [PATCH 31/45] linux-user/hppa: Force all code addresses to PRIV_USER Richard Henderson
2024-04-25 0:00 ` [PATCH 32/45] target/hppa: Store full iaoq_f and page bits of iaoq_d in TB Richard Henderson
2024-04-25 0:00 ` [PATCH 33/45] target/hppa: Do not mask in copy_iaoq_entry Richard Henderson
2024-04-25 0:00 ` [PATCH 34/45] target/hppa: Improve hppa_cpu_dump_state Richard Henderson
2024-04-25 0:00 ` [PATCH 35/45] target/hppa: Split PSW X and B into their own field Richard Henderson
2024-04-25 0:00 ` [PATCH 36/45] target/hppa: Manage PSW_X and PSW_B in translator Richard Henderson
2024-04-25 0:00 ` [PATCH 37/45] target/hppa: Implement PSW_B Richard Henderson
2024-04-25 0:00 ` [PATCH 38/45] target/hppa: Implement PSW_X Richard Henderson
2024-04-25 0:00 ` Richard Henderson [this message]
2024-04-25 0:00 ` [PATCH 40/45] target/hppa: Adjust priv for B,GATE at runtime Richard Henderson
2024-04-25 0:00 ` [PATCH 41/45] target/hppa: Implement CF_PCREL Richard Henderson
2024-04-25 0:00 ` [PATCH 42/45] target/hppa: Implement PSW_T Richard Henderson
2024-04-25 0:00 ` [PATCH 43/45] target/hppa: Implement PSW_H, PSW_L Richard Henderson
2024-04-25 0:00 ` [PATCH 44/45] target/hppa: Log cpu state at interrupt Richard Henderson
2024-04-25 0:00 ` [PATCH 45/45] target/hppa: Log cpu state on return-from-interrupt Richard Henderson
2024-05-10 14:48 ` [PATCH 00/45] target/hppa: Misc improvements Philippe Mathieu-Daudé
2024-05-12 16:08 ` Sven Schnelle
2024-05-13 6:11 ` Helge Deller
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