From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org, zhao1.liu@intel.com
Subject: [PATCH v2 06/25] target/i386: pull cc_op update to callers of gen_jmp_rel{, _csize}
Date: Mon, 6 May 2024 10:09:38 +0200 [thread overview]
Message-ID: <20240506080957.10005-7-pbonzini@redhat.com> (raw)
In-Reply-To: <20240506080957.10005-1-pbonzini@redhat.com>
gen_update_cc_op must be called before control flow splits. Doing it
in gen_jmp_rel{,_csize} may hide bugs, instead assert that cc_op is
clean---even if that means a few more calls to gen_update_cc_op().
With this new invariant, setting cc_op to CC_OP_DYNAMIC is unnecessary
since the caller should have done it.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/translate.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 6b766f5dd3f..17bf85da0ce 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -2852,6 +2852,8 @@ static void gen_jmp_rel(DisasContext *s, MemOp ot, int diff, int tb_num)
target_ulong new_pc = s->pc + diff;
target_ulong new_eip = new_pc - s->cs_base;
+ assert(!s->cc_op_dirty);
+
/* In 64-bit mode, operand size is fixed at 64 bits. */
if (!CODE64(s)) {
if (ot == MO_16) {
@@ -2865,9 +2867,6 @@ static void gen_jmp_rel(DisasContext *s, MemOp ot, int diff, int tb_num)
}
new_eip &= mask;
- gen_update_cc_op(s);
- set_cc_op(s, CC_OP_DYNAMIC);
-
if (tb_cflags(s->base.tb) & CF_PCREL) {
tcg_gen_addi_tl(cpu_eip, cpu_eip, new_pc - s->pc_save);
/*
@@ -5145,6 +5144,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
: (int16_t)insn_get(env, s, MO_16));
gen_push_v(s, eip_next_tl(s));
gen_bnd_jmp(s);
+ gen_update_cc_op(s);
gen_jmp_rel(s, dflag, diff, 0);
}
break;
@@ -5168,6 +5168,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
? (int32_t)insn_get(env, s, MO_32)
: (int16_t)insn_get(env, s, MO_16));
gen_bnd_jmp(s);
+ gen_update_cc_op(s);
gen_jmp_rel(s, dflag, diff, 0);
}
break;
@@ -5188,6 +5189,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
case 0xeb: /* jmp Jb */
{
int diff = (int8_t)insn_get(env, s, MO_8);
+ gen_update_cc_op(s);
gen_jmp_rel(s, dflag, diff, 0);
}
break;
--
2.45.0
next prev parent reply other threads:[~2024-05-06 8:10 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-06 8:09 [PATCH v2 00/25] target/i386: convert 1-byte opcodes to new decoder Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 01/25] target/i386: use TSTEQ/TSTNE to test low bits Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 02/25] target/i386: use TSTEQ/TSTNE to check flags Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 03/25] target/i386: remove mask from CCPrepare Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 04/25] target/i386: cc_op is not dynamic in gen_jcc1 Paolo Bonzini
2024-05-06 15:53 ` Richard Henderson
2024-05-06 8:09 ` [PATCH v2 05/25] target/i386: cleanup cc_op changes for REP/REPZ/REPNZ Paolo Bonzini
2024-05-06 16:07 ` Richard Henderson
2024-05-06 16:31 ` Paolo Bonzini
2024-05-06 16:39 ` Richard Henderson
2024-05-06 8:09 ` Paolo Bonzini [this message]
2024-05-06 16:12 ` [PATCH v2 06/25] target/i386: pull cc_op update to callers of gen_jmp_rel{,_csize} Richard Henderson
2024-05-06 8:09 ` [PATCH v2 07/25] target/i386: extend cc_* when using them to compute flags Paolo Bonzini
2024-05-06 16:16 ` Richard Henderson
2024-05-06 8:09 ` [PATCH v2 08/25] target/i386: do not use s->T0 and s->T1 as scratch registers for CCPrepare Paolo Bonzini
2024-05-06 16:18 ` Richard Henderson
2024-05-06 8:09 ` [PATCH v2 09/25] target/i386: clarify the "reg" argument of functions returning CCPrepare Paolo Bonzini
2024-05-06 16:19 ` Richard Henderson
2024-05-06 8:09 ` [PATCH v2 10/25] target/i386: cleanup *gen_eob* Paolo Bonzini
2024-05-06 16:21 ` Richard Henderson
2024-05-06 8:09 ` [PATCH v2 11/25] target/i386: reintroduce debugging mechanism Paolo Bonzini
2024-05-06 16:23 ` Richard Henderson
2024-05-06 8:09 ` [PATCH v2 12/25] target/i386: move 00-5F opcodes to new decoder Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 13/25] target/i386: extract gen_far_call/jmp, reordering temporaries Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 14/25] target/i386: allow instructions with more than one immediate Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 15/25] target/i386: move 60-BF opcodes to new decoder Paolo Bonzini
2024-05-06 16:44 ` Richard Henderson
2024-05-06 8:09 ` [PATCH v2 16/25] target/i386: generalize gen_movl_seg_T0 Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 17/25] target/i386: move C0-FF opcodes to new decoder (except for x87) Paolo Bonzini
2024-05-06 16:56 ` Richard Henderson
2024-05-06 8:09 ` [PATCH v2 18/25] target/i386: merge and enlarge a few ranges for call to disas_insn_new Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 19/25] target/i386: move remaining conditional operations to new decoder Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 20/25] target/i386: move BSWAP " Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 21/25] target/i386: port extensions of one-byte opcodes " Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 22/25] target/i386: remove now-converted opcodes from old decoder Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 23/25] target/i386: decode x87 instructions in a separate function Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 24/25] target/i386: split legacy decoder into " Paolo Bonzini
2024-05-06 8:09 ` [PATCH v2 25/25] target/i386: remove duplicate prefix decoding Paolo Bonzini
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