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Mon, 06 May 2024 05:37:31 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Philippe =?unknown-8bit?q?Mathieu-Daud=C3=A9?= Subject: [PULL 00/28] Accelerator patches for 2024-05-06 Date: Mon, 6 May 2024 14:37:00 +0200 Message-ID: <20240506123728.65278-1-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The following changes since commit 248f6f62df073a3b4158fd0093863ab885feabb5: Merge tag 'pull-axp-20240504' of https://gitlab.com/rth7680/qemu into staging (2024-05-04 08:39:46 -0700) are available in the Git repository at: https://github.com/philmd/qemu.git tags/accel-next-20240506 for you to fetch changes up to c984d1d8916df8abac71325a5a135cd851b2106a: MAINTAINERS: Update my email address (2024-05-06 14:33:49 +0200) ---------------------------------------------------------------- Accelerator patches - Extract page-protection definitions to page-protection.h - Rework in accel/tcg in preparation of extracting TCG fields from CPUState - More uses of get_task_state() in user emulation - Xen refactors in preparation for adding multiple map caches (Juergen & Edgar) - MAINTAINERS updates (Aleksandar and Bin) ---------------------------------------------------------------- Aleksandar Rikalo (1): MAINTAINERS: Update Aleksandar Rikalo email BALATON Zoltan (1): exec/cpu: Rename PAGE_BITS macro to PAGE_RWX Bin Meng (1): MAINTAINERS: Update my email address Edgar E. Iglesias (9): xen: mapcache: Refactor lock functions for multi-instance xen: mapcache: Refactor xen_map_cache for multi-instance xen: mapcache: Refactor xen_remap_bucket for multi-instance xen: mapcache: Break out xen_ram_addr_from_mapcache_single xen: mapcache: Refactor xen_replace_cache_entry_unlocked xen: mapcache: Refactor xen_invalidate_map_cache_entry_unlocked xen: mapcache: Break out xen_invalidate_map_cache_single() xen: mapcache: Break out xen_map_cache_init_single() softmmu: Pass RAM MemoryRegion and is_write in xen_map_cache() Juergen Gross (2): softmmu: let qemu_map_ram_ptr() use qemu_ram_ptr_length() xen: let xen_ram_addr_from_mapcache() return -1 in case of not found entry Philippe Mathieu-Daudé (14): exec/cpu: Indent TARGET_PAGE_foo definitions exec/cpu: Remove obsolete PAGE_RESERVED definition exec/cpu: Remove duplicated PAGE_PASSTHROUGH definition exec/cpu: Extract page-protection definitions to page-protection.h accel/tcg: Use cpu_loop_exit_requested() in cpu_loop_exec_tb() accel/tcg: Access tcg_cflags with getter / setter accel/tcg: Move user definition of cpu_interrupt() to user-exec.c accel/tcg: Update CPUNegativeOffsetState::can_do_io field documentation accel/tcg: Restrict qemu_plugin_vcpu_exit_hook() to TCG plugins accel/tcg: Restrict cpu_plugin_mem_cbs_enabled() to TCG accel/tcg: Move @plugin_mem_cbs from CPUState to CPUNegativeOffsetState user: Forward declare TaskState type definition user: Declare get_task_state() once in 'accel/tcg/vcpu-state.h' user: Use get_task_state() helper MAINTAINERS | 19 ++- accel/tcg/internal-common.h | 20 ++- accel/tcg/vcpu-state.h | 18 ++ bsd-user/bsd-mem.h | 1 + bsd-user/qemu.h | 11 +- include/exec/cpu-all.h | 36 ++-- include/exec/cpu-common.h | 38 +---- include/exec/exec-all.h | 3 - include/exec/page-protection.h | 41 +++++ include/hw/core/cpu.h | 38 ++--- include/qemu/plugin.h | 2 +- include/qemu/typedefs.h | 1 + include/semihosting/uaccess.h | 1 + include/sysemu/xen-mapcache.h | 11 +- linux-user/qemu.h | 10 +- target/arm/cpu.h | 1 + target/ppc/internal.h | 1 + target/ppc/mmu-radix64.h | 2 + accel/tcg/cpu-exec.c | 17 +- accel/tcg/cputlb.c | 1 + accel/tcg/plugin-gen.c | 6 +- accel/tcg/tb-maint.c | 1 + accel/tcg/tcg-accel-ops.c | 2 +- accel/tcg/translate-all.c | 9 - accel/tcg/user-exec.c | 11 +- bsd-user/mmap.c | 7 +- bsd-user/signal.c | 1 + cpu-target.c | 1 + gdbstub/gdbstub.c | 3 +- gdbstub/user-target.c | 4 +- hw/core/cpu-common.c | 4 + hw/ppc/ppc440_bamboo.c | 1 + hw/ppc/sam460ex.c | 1 + hw/ppc/virtex_ml507.c | 1 + hw/xen/xen-mapcache.c | 212 +++++++++++++----------- linux-user/arm/cpu_loop.c | 1 + linux-user/elfload.c | 3 +- linux-user/mmap.c | 11 +- linux-user/signal.c | 1 + linux-user/syscall.c | 9 +- plugins/core.c | 2 +- system/physmem.c | 82 ++++----- target/alpha/helper.c | 1 + target/arm/cpu.c | 2 +- target/arm/ptw.c | 1 + target/arm/tcg/m_helper.c | 1 + target/arm/tcg/mte_helper.c | 1 + target/arm/tcg/sve_helper.c | 1 + target/avr/cpu.c | 2 +- target/avr/helper.c | 1 + target/cris/mmu.c | 5 +- target/hexagon/cpu.c | 2 +- target/hppa/cpu.c | 2 +- target/hppa/mem_helper.c | 1 + target/hppa/translate.c | 1 + target/i386/cpu.c | 2 +- target/i386/helper.c | 2 +- target/i386/tcg/sysemu/excp_helper.c | 1 + target/loongarch/cpu.c | 2 +- target/loongarch/tcg/tlb_helper.c | 1 + target/m68k/helper.c | 1 + target/microblaze/cpu.c | 2 +- target/microblaze/helper.c | 3 +- target/microblaze/mmu.c | 1 + target/mips/sysemu/physaddr.c | 1 + target/mips/tcg/exception.c | 2 +- target/mips/tcg/sysemu/special_helper.c | 2 +- target/mips/tcg/sysemu/tlb_helper.c | 1 + target/openrisc/cpu.c | 2 +- target/openrisc/mmu.c | 1 + target/ppc/mmu-hash32.c | 1 + target/ppc/mmu-hash64.c | 1 + target/ppc/mmu-radix64.c | 1 + target/ppc/mmu_common.c | 1 + target/ppc/mmu_helper.c | 1 + target/riscv/cpu_helper.c | 1 + target/riscv/pmp.c | 1 + target/riscv/tcg/tcg-cpu.c | 4 +- target/riscv/vector_helper.c | 1 + target/rx/cpu.c | 3 +- target/s390x/mmu_helper.c | 1 + target/s390x/tcg/mem_helper.c | 1 + target/sh4/cpu.c | 4 +- target/sh4/helper.c | 1 + target/sparc/cpu.c | 2 +- target/sparc/ldst_helper.c | 1 + target/sparc/mmu_helper.c | 1 + target/tricore/cpu.c | 2 +- target/tricore/helper.c | 1 + target/xtensa/mmu_helper.c | 1 + target/xtensa/op_helper.c | 1 + 91 files changed, 421 insertions(+), 300 deletions(-) create mode 100644 accel/tcg/vcpu-state.h create mode 100644 include/exec/page-protection.h -- 2.41.0