From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Bin Meng" <bin.meng.cn@windriver.com>,
"Bin Meng" <bmeng.cn@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL 28/28] MAINTAINERS: Update my email address
Date: Mon, 6 May 2024 14:37:28 +0200 [thread overview]
Message-ID: <20240506123728.65278-29-philmd@linaro.org> (raw)
In-Reply-To: <20240506123728.65278-1-philmd@linaro.org>
From: Bin Meng <bin.meng.cn@windriver.com>
The old Wind River email address (bin.meng@windriver.com) is no longer
available due to an internal infrastructure change within the company.
While a new email address (bin.meng.cn@windriver.com) has been assigned
to me, I am unable to find a way to send this patch directly from the
new address. Presumably, the basic authentication with client submission
(SMTP AUTH) [1] has been disabled by the company's IT.
Switch to use my personal email address instead.
Signed-off-by: Bin Meng <bin.meng.cn@windriver.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
[1] https://learn.microsoft.com/en-us/exchange/mail-flow-best-practices/how-to-set-up-a-multifunction-device-or-application-to-send-email-using-microsoft-365-or-office-365
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240505072312.2776074-1-bmeng.cn@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
MAINTAINERS | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 63ada48bb4..84391777db 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -320,7 +320,7 @@ F: tests/tcg/ppc*/*
RISC-V TCG CPUs
M: Palmer Dabbelt <palmer@dabbelt.com>
M: Alistair Francis <alistair.francis@wdc.com>
-M: Bin Meng <bin.meng@windriver.com>
+M: Bin Meng <bmeng.cn@gmail.com>
R: Weiwei Li <liwei1518@gmail.com>
R: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
R: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
@@ -1603,7 +1603,7 @@ F: include/hw/riscv/opentitan.h
F: include/hw/*/ibex_*.h
Microchip PolarFire SoC Icicle Kit
-M: Bin Meng <bin.meng@windriver.com>
+M: Bin Meng <bmeng.cn@gmail.com>
L: qemu-riscv@nongnu.org
S: Supported
F: docs/system/riscv/microchip-icicle-kit.rst
@@ -1630,7 +1630,7 @@ F: include/hw/char/shakti_uart.h
SiFive Machines
M: Alistair Francis <Alistair.Francis@wdc.com>
-M: Bin Meng <bin.meng@windriver.com>
+M: Bin Meng <bmeng.cn@gmail.com>
M: Palmer Dabbelt <palmer@dabbelt.com>
L: qemu-riscv@nongnu.org
S: Supported
@@ -2126,7 +2126,7 @@ F: hw/ssi/xilinx_*
SD (Secure Card)
M: Philippe Mathieu-Daudé <philmd@linaro.org>
-M: Bin Meng <bin.meng@windriver.com>
+M: Bin Meng <bmeng.cn@gmail.com>
L: qemu-block@nongnu.org
S: Odd Fixes
F: include/hw/sd/sd*
--
2.41.0
next prev parent reply other threads:[~2024-05-06 12:43 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-06 12:37 [PULL 00/28] Accelerator patches for 2024-05-06 Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 01/28] exec/cpu: Indent TARGET_PAGE_foo definitions Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 02/28] exec/cpu: Rename PAGE_BITS macro to PAGE_RWX Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 03/28] exec/cpu: Remove obsolete PAGE_RESERVED definition Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 04/28] exec/cpu: Remove duplicated PAGE_PASSTHROUGH definition Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 05/28] exec/cpu: Extract page-protection definitions to page-protection.h Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 06/28] accel/tcg: Use cpu_loop_exit_requested() in cpu_loop_exec_tb() Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 07/28] accel/tcg: Access tcg_cflags with getter / setter Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 08/28] accel/tcg: Move user definition of cpu_interrupt() to user-exec.c Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 09/28] accel/tcg: Update CPUNegativeOffsetState::can_do_io field documentation Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 10/28] accel/tcg: Restrict qemu_plugin_vcpu_exit_hook() to TCG plugins Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 11/28] accel/tcg: Restrict cpu_plugin_mem_cbs_enabled() to TCG Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 12/28] accel/tcg: Move @plugin_mem_cbs from CPUState to CPUNegativeOffsetState Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 13/28] user: Forward declare TaskState type definition Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 14/28] user: Declare get_task_state() once in 'accel/tcg/vcpu-state.h' Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 15/28] user: Use get_task_state() helper Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 16/28] softmmu: let qemu_map_ram_ptr() use qemu_ram_ptr_length() Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 17/28] xen: let xen_ram_addr_from_mapcache() return -1 in case of not found entry Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 18/28] xen: mapcache: Refactor lock functions for multi-instance Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 19/28] xen: mapcache: Refactor xen_map_cache " Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 20/28] xen: mapcache: Refactor xen_remap_bucket " Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 21/28] xen: mapcache: Break out xen_ram_addr_from_mapcache_single Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 22/28] xen: mapcache: Refactor xen_replace_cache_entry_unlocked Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 23/28] xen: mapcache: Refactor xen_invalidate_map_cache_entry_unlocked Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 24/28] xen: mapcache: Break out xen_invalidate_map_cache_single() Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 25/28] xen: mapcache: Break out xen_map_cache_init_single() Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 26/28] softmmu: Pass RAM MemoryRegion and is_write in xen_map_cache() Philippe Mathieu-Daudé
2024-05-06 12:37 ` [PULL 27/28] MAINTAINERS: Update Aleksandar Rikalo email Philippe Mathieu-Daudé
2024-05-06 12:37 ` Philippe Mathieu-Daudé [this message]
2024-05-06 12:44 ` [PULL 00/28] Accelerator patches for 2024-05-06 Philippe Mathieu-Daudé
2024-05-06 19:59 ` Richard Henderson
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