* [PATCH v2 0/3] Upgrade ACPI SPCR table to support SPCR table version 4 format
@ 2024-05-07 5:22 Sia Jee Heng
2024-05-07 5:22 ` [PATCH v2 1/3] qtest: allow SPCR acpi table changes Sia Jee Heng
` (2 more replies)
0 siblings, 3 replies; 13+ messages in thread
From: Sia Jee Heng @ 2024-05-07 5:22 UTC (permalink / raw)
To: qemu-arm, qemu-devel, qemu-riscv
Cc: mst, imammedo, anisinha, peter.maydell, jeeheng.sia,
shannon.zhaosl, sunilvl, palmer, alistair.francis, bin.meng,
liwei1518, dbarboza, zhiwei_liu
Update the SPCR table to accommodate the SPCR Table version 4 [1].
The SPCR table has been modified to adhere to the version 4 format [2].
Meanwhile, the virt SPCR golden reference files have been updated to
accommodate the SPCR Table version 4.
This patch series depends on Sunil's patch series [3], where Bios-Table-Test
is now supported by both ARM and RISC-V.
[1]: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
[2]: https://github.com/acpica/acpica/pull/931
[3]: https://lore.kernel.org/all/20240315130519.2378765-1-sunilvl@ventanamicro.com/
Changes in v2:
- Utilizes a three-patch approach to modify the ACPI pre-built binary
files required by the Bios-Table-Test.
- Rebases and incorporates changes to support both ARM and RISC-V ACPI
pre-built binary files.
Sia Jee Heng (3):
qtest: allow SPCR acpi table changes
hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4
format
tests/qtest/bios-tables-test: Update virt SPCR golden references
hw/acpi/aml-build.c | 14 +++++++++++---
hw/arm/virt-acpi-build.c | 10 ++++++++--
hw/riscv/virt-acpi-build.c | 12 +++++++++---
include/hw/acpi/acpi-defs.h | 7 +++++--
include/hw/acpi/aml-build.h | 2 +-
tests/data/acpi/virt/aarch64/SPCR | Bin 80 -> 90 bytes
tests/data/acpi/virt/riscv64/SPCR | Bin 80 -> 90 bytes
7 files changed, 34 insertions(+), 11 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2 1/3] qtest: allow SPCR acpi table changes
2024-05-07 5:22 [PATCH v2 0/3] Upgrade ACPI SPCR table to support SPCR table version 4 format Sia Jee Heng
@ 2024-05-07 5:22 ` Sia Jee Heng
2024-05-13 3:55 ` Alistair Francis
2024-05-07 5:22 ` [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format Sia Jee Heng
2024-05-07 5:22 ` [PATCH v2 3/3] tests/qtest/bios-tables-test: Update virt SPCR golden references Sia Jee Heng
2 siblings, 1 reply; 13+ messages in thread
From: Sia Jee Heng @ 2024-05-07 5:22 UTC (permalink / raw)
To: qemu-arm, qemu-devel, qemu-riscv
Cc: mst, imammedo, anisinha, peter.maydell, jeeheng.sia,
shannon.zhaosl, sunilvl, palmer, alistair.francis, bin.meng,
liwei1518, dbarboza, zhiwei_liu
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..3f12ca546b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,3 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/virt/riscv64/SPCR",
+"tests/data/acpi/virt/aarch64/SPCR",
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format
2024-05-07 5:22 [PATCH v2 0/3] Upgrade ACPI SPCR table to support SPCR table version 4 format Sia Jee Heng
2024-05-07 5:22 ` [PATCH v2 1/3] qtest: allow SPCR acpi table changes Sia Jee Heng
@ 2024-05-07 5:22 ` Sia Jee Heng
2024-05-13 4:01 ` Alistair Francis
` (2 more replies)
2024-05-07 5:22 ` [PATCH v2 3/3] tests/qtest/bios-tables-test: Update virt SPCR golden references Sia Jee Heng
2 siblings, 3 replies; 13+ messages in thread
From: Sia Jee Heng @ 2024-05-07 5:22 UTC (permalink / raw)
To: qemu-arm, qemu-devel, qemu-riscv
Cc: mst, imammedo, anisinha, peter.maydell, jeeheng.sia,
shannon.zhaosl, sunilvl, palmer, alistair.francis, bin.meng,
liwei1518, dbarboza, zhiwei_liu
Update the SPCR table to accommodate the SPCR Table version 4 [1].
The SPCR table has been modified to adhere to the version 4 format [2].
[1]: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
[2]: https://github.com/acpica/acpica/pull/931
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
---
hw/acpi/aml-build.c | 14 +++++++++++---
hw/arm/virt-acpi-build.c | 10 ++++++++--
hw/riscv/virt-acpi-build.c | 12 +++++++++---
include/hw/acpi/acpi-defs.h | 7 +++++--
include/hw/acpi/aml-build.h | 2 +-
5 files changed, 34 insertions(+), 11 deletions(-)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 6d4517cfbe..7c43573eef 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -1996,7 +1996,7 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
void build_spcr(GArray *table_data, BIOSLinker *linker,
const AcpiSpcrData *f, const uint8_t rev,
- const char *oem_id, const char *oem_table_id)
+ const char *oem_id, const char *oem_table_id, const char *name)
{
AcpiTable table = { .sig = "SPCR", .rev = rev, .oem_id = oem_id,
.oem_table_id = oem_table_id };
@@ -2042,8 +2042,16 @@ void build_spcr(GArray *table_data, BIOSLinker *linker,
build_append_int_noprefix(table_data, f->pci_flags, 4);
/* PCI Segment */
build_append_int_noprefix(table_data, f->pci_segment, 1);
- /* Reserved */
- build_append_int_noprefix(table_data, 0, 4);
+ /* UartClkFreq */
+ build_append_int_noprefix(table_data, f->uart_clk_freq, 4);
+ /* PreciseBaudrate */
+ build_append_int_noprefix(table_data, f->precise_baudrate, 4);
+ /* NameSpaceStringLength */
+ build_append_int_noprefix(table_data, f->namespace_string_length, 2);
+ /* NameSpaceStringOffset */
+ build_append_int_noprefix(table_data, f->namespace_string_offset, 2);
+ /* NamespaceString[] */
+ g_array_append_vals(table_data, name, f->namespace_string_length);
acpi_table_end(linker, &table);
}
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 6a1bde61ce..cb345e8659 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -428,11 +428,12 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
/*
* Serial Port Console Redirection Table (SPCR)
- * Rev: 1.07
+ * Rev: 1.10
*/
static void
spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
{
+ const char name[] = ".";
AcpiSpcrData serial = {
.interface_type = 3, /* ARM PL011 UART */
.base_addr.id = AML_AS_SYSTEM_MEMORY,
@@ -456,9 +457,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
.pci_function = 0,
.pci_flags = 0,
.pci_segment = 0,
+ .uart_clk_freq = 0,
+ .precise_baudrate = 0,
+ .namespace_string_length = sizeof(name),
+ .namespace_string_offset = 88,
};
- build_spcr(table_data, linker, &serial, 2, vms->oem_id, vms->oem_table_id);
+ build_spcr(table_data, linker, &serial, 4, vms->oem_id, vms->oem_table_id,
+ name);
}
/*
diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
index 0925528160..5fa3942491 100644
--- a/hw/riscv/virt-acpi-build.c
+++ b/hw/riscv/virt-acpi-build.c
@@ -176,14 +176,15 @@ acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
/*
* Serial Port Console Redirection Table (SPCR)
- * Rev: 1.07
+ * Rev: 1.10
*/
static void
spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
{
+ const char name[] = ".";
AcpiSpcrData serial = {
- .interface_type = 0, /* 16550 compatible */
+ .interface_type = 0x12, /* 16550 compatible */
.base_addr.id = AML_AS_SYSTEM_MEMORY,
.base_addr.width = 32,
.base_addr.offset = 0,
@@ -205,9 +206,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
.pci_function = 0,
.pci_flags = 0,
.pci_segment = 0,
+ .uart_clk_freq = 0,
+ .precise_baudrate = 0,
+ .namespace_string_length = sizeof(name),
+ .namespace_string_offset = 88,
};
- build_spcr(table_data, linker, &serial, 2, s->oem_id, s->oem_table_id);
+ build_spcr(table_data, linker, &serial, 4, s->oem_id, s->oem_table_id,
+ name);
}
/* RHCT Node[N] starts at offset 56 */
diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
index 0e6e82b339..2e6e341998 100644
--- a/include/hw/acpi/acpi-defs.h
+++ b/include/hw/acpi/acpi-defs.h
@@ -112,7 +112,6 @@ typedef struct AcpiSpcrData {
uint8_t flow_control;
uint8_t terminal_type;
uint8_t language;
- uint8_t reserved1;
uint16_t pci_device_id; /* Must be 0xffff if not PCI device */
uint16_t pci_vendor_id; /* Must be 0xffff if not PCI device */
uint8_t pci_bus;
@@ -120,7 +119,11 @@ typedef struct AcpiSpcrData {
uint8_t pci_function;
uint32_t pci_flags;
uint8_t pci_segment;
- uint32_t reserved2;
+ uint32_t uart_clk_freq;
+ uint32_t precise_baudrate;
+ uint32_t namespace_string_length;
+ uint32_t namespace_string_offset;
+ char namespace_string[];
} AcpiSpcrData;
#define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0)
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index a3784155cb..68c0f2dbee 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -500,5 +500,5 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog,
void build_spcr(GArray *table_data, BIOSLinker *linker,
const AcpiSpcrData *f, const uint8_t rev,
- const char *oem_id, const char *oem_table_id);
+ const char *oem_id, const char *oem_table_id, const char *name);
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 3/3] tests/qtest/bios-tables-test: Update virt SPCR golden references
2024-05-07 5:22 [PATCH v2 0/3] Upgrade ACPI SPCR table to support SPCR table version 4 format Sia Jee Heng
2024-05-07 5:22 ` [PATCH v2 1/3] qtest: allow SPCR acpi table changes Sia Jee Heng
2024-05-07 5:22 ` [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format Sia Jee Heng
@ 2024-05-07 5:22 ` Sia Jee Heng
2 siblings, 0 replies; 13+ messages in thread
From: Sia Jee Heng @ 2024-05-07 5:22 UTC (permalink / raw)
To: qemu-arm, qemu-devel, qemu-riscv
Cc: mst, imammedo, anisinha, peter.maydell, jeeheng.sia,
shannon.zhaosl, sunilvl, palmer, alistair.francis, bin.meng,
liwei1518, dbarboza, zhiwei_liu
Update the virt SPCR golden reference files to accommodate the
SPCR Table version 4 [1], utilizing the iasl binary compiled from the
latest ACPICA repository. The SPCR table has been modified to
adhere to the version 4 format [2].
[1]: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
[2]: https://github.com/acpica/acpica/pull/931
Diffs from iasl:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20240322 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/aarch64/SPCR
+ * Disassembly of /tmp/aml-DVTAN2
*
* ACPI Data Table [SPCR]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex)
*/
[000h 0000 004h] Signature : "SPCR" [Serial Port Console Redirection Table]
-[004h 0004 004h] Table Length : 00000050
-[008h 0008 001h] Revision : 02
-[009h 0009 001h] Checksum : B1
+[004h 0004 004h] Table Length : 0000005A
+[008h 0008 001h] Revision : 04
+[009h 0009 001h] Checksum : 1D
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[018h 0024 004h] Oem Revision : 00000001
[01Ch 0028 004h] Asl Compiler ID : "BXPC"
[020h 0032 004h] Asl Compiler Revision : 00000001
[024h 0036 001h] Interface Type : 03
[025h 0037 003h] Reserved : 000000
[028h 0040 00Ch] Serial Port Register : [Generic Address Structure]
[028h 0040 001h] Space ID : 00 [SystemMemory]
[029h 0041 001h] Bit Width : 20
[02Ah 0042 001h] Bit Offset : 00
[02Bh 0043 001h] Encoded Access Width : 03 [DWord Access:32]
[02Ch 0044 008h] Address : 0000000009000000
[035h 0053 001h] PCAT-compatible IRQ : 00
[036h 0054 004h] Interrupt : 00000021
[03Ah 0058 001h] Baud Rate : 03
[03Bh 0059 001h] Parity : 00
[03Ch 0060 001h] Stop Bits : 01
[03Dh 0061 001h] Flow Control : 02
[03Eh 0062 001h] Terminal Type : 00
[03Fh 0063 001h] Language : 00
[040h 0064 002h] PCI Device ID : FFFF
[042h 0066 002h] PCI Vendor ID : FFFF
[044h 0068 001h] PCI Bus : 00
[045h 0069 001h] PCI Device : 00
[046h 0070 001h] PCI Function : 00
[047h 0071 004h] PCI Flags : 00000000
[04Bh 0075 001h] PCI Segment : 00
[04Ch 0076 004h] Uart Clock Freq : 00000000
-/**** ACPI table terminates in the middle of a data structure! (dump table)
-CurrentOffset: 50, TableLength: 50 ***/
\ No newline at end of file
+[050h 0080 004h] Precise Baud rate : 00000000
+[054h 0084 002h] NameSpaceStringLength : 0002
+[056h 0086 002h] NameSpaceStringOffset : 0058
+[058h 0088 002h] NamespaceString : "."
+
+Raw Table Data: Length 90 (0x5A)
+
+ 0000: 53 50 43 52 5A 00 00 00 04 1D 42 4F 43 48 53 20 // SPCRZ.....BOCHS
+ 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
+ 0020: 01 00 00 00 03 00 00 00 00 20 00 03 00 00 00 09 // ......... ......
+ 0030: 00 00 00 00 08 00 21 00 00 00 03 00 01 02 00 00 // ......!.........
+ 0040: FF FF FF FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................
+ 0050: 00 00 00 00 02 00 58 00 2E 00 // ......X...
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200925 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/riscv64/SPCR, Mon May 6 05:34:22 2024
+ * Disassembly of /tmp/aml-27E8M2, Mon May 6 05:34:22 2024
*
* ACPI Data Table [SPCR]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
-[004h 0004 4] Table Length : 00000050
-[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : B9
+[004h 0004 4] Table Length : 0000005A
+[008h 0008 1] Revision : 04
+[009h 0009 1] Checksum : 25
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 1] Interface Type : 00
[025h 0037 3] Reserved : 000000
[028h 0040 12] Serial Port Register : [Generic Address Structure]
[028h 0040 1] Space ID : 00 [SystemMemory]
[029h 0041 1] Bit Width : 20
[02Ah 0042 1] Bit Offset : 00
[02Bh 0043 1] Encoded Access Width : 01 [Byte Access:8]
[02Ch 0044 8] Address : 0000000010000000
[036h 0054 4] Interrupt : 0000000A
[03Ah 0058 1] Baud Rate : 07
[03Bh 0059 1] Parity : 00
[03Ch 0060 1] Stop Bits : 01
[03Dh 0061 1] Flow Control : 00
[03Eh 0062 1] Terminal Type : 00
[04Ch 0076 1] Reserved : 00
[040h 0064 2] PCI Device ID : FFFF
[042h 0066 2] PCI Vendor ID : FFFF
[044h 0068 1] PCI Bus : 00
[045h 0069 1] PCI Device : 00
[046h 0070 1] PCI Function : 00
[047h 0071 4] PCI Flags : 00000000
[04Bh 0075 1] PCI Segment : 00
[04Ch 0076 4] Reserved : 00000000
-Raw Table Data: Length 80 (0x50)
+Raw Table Data: Length 90 (0x5A)
- 0000: 53 50 43 52 50 00 00 00 02 B9 42 4F 43 48 53 20 // SPCRP.....BOCHS
+ 0000: 53 50 43 52 5A 00 00 00 04 25 42 4F 43 48 53 20 // SPCRZ....%BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
0020: 01 00 00 00 00 00 00 00 00 20 00 01 00 00 00 10 // ......... ......
0030: 00 00 00 00 10 00 0A 00 00 00 07 00 01 00 00 03 // ................
0040: FF FF FF FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................
+ 0050: 00 00 00 00 02 00 58 00 2E 00 // ......X...
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
---
tests/data/acpi/virt/aarch64/SPCR | Bin 80 -> 90 bytes
tests/data/acpi/virt/riscv64/SPCR | Bin 80 -> 90 bytes
tests/qtest/bios-tables-test-allowed-diff.h | 2 --
3 files changed, 2 deletions(-)
diff --git a/tests/data/acpi/virt/aarch64/SPCR b/tests/data/acpi/virt/aarch64/SPCR
index cf0f2b75226515097c08d2e2016a83a4f08812ba..acafd161ba2e2fdfbf081d4977ea05621152c9c9 100644
GIT binary patch
delta 27
hcmWHD;tCFM4vJ!6U|^A*$mPZbWH2x>L@?+v002b>1KR)q
delta 16
XcmazF;0g|K4hmpkU|`xfk;@GLAfp4(
diff --git a/tests/data/acpi/virt/riscv64/SPCR b/tests/data/acpi/virt/riscv64/SPCR
index 4da9daf65f71a13ac2b488d4e9728f194b569a43..54fb0a4c749728c93291c8b37fd8ab785189ce67 100755
GIT binary patch
delta 27
hcmWHD;tCFM4vJ!6U|><5$mPZbWH2x>L@?+v002dP1LFVy
delta 16
XcmazF;0g|K4hmpkU|`xgk;@GLAj1RM
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index 3f12ca546b..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,3 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/virt/riscv64/SPCR",
-"tests/data/acpi/virt/aarch64/SPCR",
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v2 1/3] qtest: allow SPCR acpi table changes
2024-05-07 5:22 ` [PATCH v2 1/3] qtest: allow SPCR acpi table changes Sia Jee Heng
@ 2024-05-13 3:55 ` Alistair Francis
2024-05-13 6:31 ` Michael S. Tsirkin
0 siblings, 1 reply; 13+ messages in thread
From: Alistair Francis @ 2024-05-13 3:55 UTC (permalink / raw)
To: Sia Jee Heng
Cc: qemu-arm, qemu-devel, qemu-riscv, mst, imammedo, anisinha,
peter.maydell, shannon.zhaosl, sunilvl, palmer, alistair.francis,
bin.meng, liwei1518, dbarboza, zhiwei_liu
On Tue, May 7, 2024 at 3:24 PM Sia Jee Heng
<jeeheng.sia@starfivetech.com> wrote:
Can you describe why you are doing this and that it will be reverted
in the commit message?
Alistair
>
> Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
> index dfb8523c8b..3f12ca546b 100644
> --- a/tests/qtest/bios-tables-test-allowed-diff.h
> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
> @@ -1 +1,3 @@
> /* List of comma-separated changed AML files to ignore */
> +"tests/data/acpi/virt/riscv64/SPCR",
> +"tests/data/acpi/virt/aarch64/SPCR",
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format
2024-05-07 5:22 ` [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format Sia Jee Heng
@ 2024-05-13 4:01 ` Alistair Francis
2024-05-13 5:16 ` Sunil V L
2024-05-13 6:31 ` Michael S. Tsirkin
2 siblings, 0 replies; 13+ messages in thread
From: Alistair Francis @ 2024-05-13 4:01 UTC (permalink / raw)
To: Sia Jee Heng
Cc: qemu-arm, qemu-devel, qemu-riscv, mst, imammedo, anisinha,
peter.maydell, shannon.zhaosl, sunilvl, palmer, alistair.francis,
bin.meng, liwei1518, dbarboza, zhiwei_liu
On Tue, May 7, 2024 at 3:24 PM Sia Jee Heng
<jeeheng.sia@starfivetech.com> wrote:
>
> Update the SPCR table to accommodate the SPCR Table version 4 [1].
> The SPCR table has been modified to adhere to the version 4 format [2].
>
> [1]: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
> [2]: https://github.com/acpica/acpica/pull/931
>
> Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/acpi/aml-build.c | 14 +++++++++++---
> hw/arm/virt-acpi-build.c | 10 ++++++++--
> hw/riscv/virt-acpi-build.c | 12 +++++++++---
> include/hw/acpi/acpi-defs.h | 7 +++++--
> include/hw/acpi/aml-build.h | 2 +-
> 5 files changed, 34 insertions(+), 11 deletions(-)
>
> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
> index 6d4517cfbe..7c43573eef 100644
> --- a/hw/acpi/aml-build.c
> +++ b/hw/acpi/aml-build.c
> @@ -1996,7 +1996,7 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
>
> void build_spcr(GArray *table_data, BIOSLinker *linker,
> const AcpiSpcrData *f, const uint8_t rev,
> - const char *oem_id, const char *oem_table_id)
> + const char *oem_id, const char *oem_table_id, const char *name)
> {
> AcpiTable table = { .sig = "SPCR", .rev = rev, .oem_id = oem_id,
> .oem_table_id = oem_table_id };
> @@ -2042,8 +2042,16 @@ void build_spcr(GArray *table_data, BIOSLinker *linker,
> build_append_int_noprefix(table_data, f->pci_flags, 4);
> /* PCI Segment */
> build_append_int_noprefix(table_data, f->pci_segment, 1);
> - /* Reserved */
> - build_append_int_noprefix(table_data, 0, 4);
> + /* UartClkFreq */
> + build_append_int_noprefix(table_data, f->uart_clk_freq, 4);
> + /* PreciseBaudrate */
> + build_append_int_noprefix(table_data, f->precise_baudrate, 4);
> + /* NameSpaceStringLength */
> + build_append_int_noprefix(table_data, f->namespace_string_length, 2);
> + /* NameSpaceStringOffset */
> + build_append_int_noprefix(table_data, f->namespace_string_offset, 2);
> + /* NamespaceString[] */
> + g_array_append_vals(table_data, name, f->namespace_string_length);
>
> acpi_table_end(linker, &table);
> }
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 6a1bde61ce..cb345e8659 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -428,11 +428,12 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>
> /*
> * Serial Port Console Redirection Table (SPCR)
> - * Rev: 1.07
> + * Rev: 1.10
> */
> static void
> spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> {
> + const char name[] = ".";
> AcpiSpcrData serial = {
> .interface_type = 3, /* ARM PL011 UART */
> .base_addr.id = AML_AS_SYSTEM_MEMORY,
> @@ -456,9 +457,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> .pci_function = 0,
> .pci_flags = 0,
> .pci_segment = 0,
> + .uart_clk_freq = 0,
> + .precise_baudrate = 0,
> + .namespace_string_length = sizeof(name),
> + .namespace_string_offset = 88,
> };
>
> - build_spcr(table_data, linker, &serial, 2, vms->oem_id, vms->oem_table_id);
> + build_spcr(table_data, linker, &serial, 4, vms->oem_id, vms->oem_table_id,
> + name);
> }
>
> /*
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index 0925528160..5fa3942491 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -176,14 +176,15 @@ acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
>
> /*
> * Serial Port Console Redirection Table (SPCR)
> - * Rev: 1.07
> + * Rev: 1.10
> */
>
> static void
> spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
> {
> + const char name[] = ".";
> AcpiSpcrData serial = {
> - .interface_type = 0, /* 16550 compatible */
> + .interface_type = 0x12, /* 16550 compatible */
> .base_addr.id = AML_AS_SYSTEM_MEMORY,
> .base_addr.width = 32,
> .base_addr.offset = 0,
> @@ -205,9 +206,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
> .pci_function = 0,
> .pci_flags = 0,
> .pci_segment = 0,
> + .uart_clk_freq = 0,
> + .precise_baudrate = 0,
> + .namespace_string_length = sizeof(name),
> + .namespace_string_offset = 88,
> };
>
> - build_spcr(table_data, linker, &serial, 2, s->oem_id, s->oem_table_id);
> + build_spcr(table_data, linker, &serial, 4, s->oem_id, s->oem_table_id,
> + name);
> }
>
> /* RHCT Node[N] starts at offset 56 */
> diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
> index 0e6e82b339..2e6e341998 100644
> --- a/include/hw/acpi/acpi-defs.h
> +++ b/include/hw/acpi/acpi-defs.h
> @@ -112,7 +112,6 @@ typedef struct AcpiSpcrData {
> uint8_t flow_control;
> uint8_t terminal_type;
> uint8_t language;
> - uint8_t reserved1;
> uint16_t pci_device_id; /* Must be 0xffff if not PCI device */
> uint16_t pci_vendor_id; /* Must be 0xffff if not PCI device */
> uint8_t pci_bus;
> @@ -120,7 +119,11 @@ typedef struct AcpiSpcrData {
> uint8_t pci_function;
> uint32_t pci_flags;
> uint8_t pci_segment;
> - uint32_t reserved2;
> + uint32_t uart_clk_freq;
> + uint32_t precise_baudrate;
> + uint32_t namespace_string_length;
> + uint32_t namespace_string_offset;
> + char namespace_string[];
> } AcpiSpcrData;
>
> #define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0)
> diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> index a3784155cb..68c0f2dbee 100644
> --- a/include/hw/acpi/aml-build.h
> +++ b/include/hw/acpi/aml-build.h
> @@ -500,5 +500,5 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog,
>
> void build_spcr(GArray *table_data, BIOSLinker *linker,
> const AcpiSpcrData *f, const uint8_t rev,
> - const char *oem_id, const char *oem_table_id);
> + const char *oem_id, const char *oem_table_id, const char *name);
> #endif
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format
2024-05-07 5:22 ` [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format Sia Jee Heng
2024-05-13 4:01 ` Alistair Francis
@ 2024-05-13 5:16 ` Sunil V L
2024-05-14 11:16 ` JeeHeng Sia
2024-05-13 6:31 ` Michael S. Tsirkin
2 siblings, 1 reply; 13+ messages in thread
From: Sunil V L @ 2024-05-13 5:16 UTC (permalink / raw)
To: Sia Jee Heng
Cc: qemu-arm, qemu-devel, qemu-riscv, mst, imammedo, anisinha,
peter.maydell, shannon.zhaosl, palmer, alistair.francis, bin.meng,
liwei1518, dbarboza, zhiwei_liu
Hi Sia Jee Heng,
On Mon, May 06, 2024 at 10:22:11PM -0700, Sia Jee Heng wrote:
> Update the SPCR table to accommodate the SPCR Table version 4 [1].
> The SPCR table has been modified to adhere to the version 4 format [2].
>
> [1]: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
> [2]: https://github.com/acpica/acpica/pull/931
>
> Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
> ---
> hw/acpi/aml-build.c | 14 +++++++++++---
> hw/arm/virt-acpi-build.c | 10 ++++++++--
> hw/riscv/virt-acpi-build.c | 12 +++++++++---
> include/hw/acpi/acpi-defs.h | 7 +++++--
> include/hw/acpi/aml-build.h | 2 +-
> 5 files changed, 34 insertions(+), 11 deletions(-)
>
> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
> index 6d4517cfbe..7c43573eef 100644
> --- a/hw/acpi/aml-build.c
> +++ b/hw/acpi/aml-build.c
> @@ -1996,7 +1996,7 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
>
> void build_spcr(GArray *table_data, BIOSLinker *linker,
> const AcpiSpcrData *f, const uint8_t rev,
> - const char *oem_id, const char *oem_table_id)
> + const char *oem_id, const char *oem_table_id, const char *name)
> {
> AcpiTable table = { .sig = "SPCR", .rev = rev, .oem_id = oem_id,
> .oem_table_id = oem_table_id };
> @@ -2042,8 +2042,16 @@ void build_spcr(GArray *table_data, BIOSLinker *linker,
> build_append_int_noprefix(table_data, f->pci_flags, 4);
> /* PCI Segment */
> build_append_int_noprefix(table_data, f->pci_segment, 1);
> - /* Reserved */
> - build_append_int_noprefix(table_data, 0, 4);
> + /* UartClkFreq */
> + build_append_int_noprefix(table_data, f->uart_clk_freq, 4);
> + /* PreciseBaudrate */
> + build_append_int_noprefix(table_data, f->precise_baudrate, 4);
> + /* NameSpaceStringLength */
> + build_append_int_noprefix(table_data, f->namespace_string_length, 2);
> + /* NameSpaceStringOffset */
> + build_append_int_noprefix(table_data, f->namespace_string_offset, 2);
> + /* NamespaceString[] */
> + g_array_append_vals(table_data, name, f->namespace_string_length);
>
Is it possible to check the revision here and add new fields only if the
revision supports it? ARM maintainers are better to comment but IMO, we
better keep ARM's SPCR in the same current version since I don't know
how consumers like linux (and other OSs) react to the change.
Thanks!
Sunil
> acpi_table_end(linker, &table);
> }
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 6a1bde61ce..cb345e8659 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -428,11 +428,12 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>
> /*
> * Serial Port Console Redirection Table (SPCR)
> - * Rev: 1.07
> + * Rev: 1.10
> */
> static void
> spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> {
> + const char name[] = ".";
> AcpiSpcrData serial = {
> .interface_type = 3, /* ARM PL011 UART */
> .base_addr.id = AML_AS_SYSTEM_MEMORY,
> @@ -456,9 +457,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> .pci_function = 0,
> .pci_flags = 0,
> .pci_segment = 0,
> + .uart_clk_freq = 0,
> + .precise_baudrate = 0,
> + .namespace_string_length = sizeof(name),
> + .namespace_string_offset = 88,
> };
>
> - build_spcr(table_data, linker, &serial, 2, vms->oem_id, vms->oem_table_id);
> + build_spcr(table_data, linker, &serial, 4, vms->oem_id, vms->oem_table_id,
> + name);
> }
>
> /*
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index 0925528160..5fa3942491 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -176,14 +176,15 @@ acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
>
> /*
> * Serial Port Console Redirection Table (SPCR)
> - * Rev: 1.07
> + * Rev: 1.10
> */
>
> static void
> spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
> {
> + const char name[] = ".";
> AcpiSpcrData serial = {
> - .interface_type = 0, /* 16550 compatible */
> + .interface_type = 0x12, /* 16550 compatible */
> .base_addr.id = AML_AS_SYSTEM_MEMORY,
> .base_addr.width = 32,
> .base_addr.offset = 0,
> @@ -205,9 +206,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
> .pci_function = 0,
> .pci_flags = 0,
> .pci_segment = 0,
> + .uart_clk_freq = 0,
> + .precise_baudrate = 0,
> + .namespace_string_length = sizeof(name),
> + .namespace_string_offset = 88,
> };
>
> - build_spcr(table_data, linker, &serial, 2, s->oem_id, s->oem_table_id);
> + build_spcr(table_data, linker, &serial, 4, s->oem_id, s->oem_table_id,
> + name);
> }
>
> /* RHCT Node[N] starts at offset 56 */
> diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
> index 0e6e82b339..2e6e341998 100644
> --- a/include/hw/acpi/acpi-defs.h
> +++ b/include/hw/acpi/acpi-defs.h
> @@ -112,7 +112,6 @@ typedef struct AcpiSpcrData {
> uint8_t flow_control;
> uint8_t terminal_type;
> uint8_t language;
> - uint8_t reserved1;
> uint16_t pci_device_id; /* Must be 0xffff if not PCI device */
> uint16_t pci_vendor_id; /* Must be 0xffff if not PCI device */
> uint8_t pci_bus;
> @@ -120,7 +119,11 @@ typedef struct AcpiSpcrData {
> uint8_t pci_function;
> uint32_t pci_flags;
> uint8_t pci_segment;
> - uint32_t reserved2;
> + uint32_t uart_clk_freq;
> + uint32_t precise_baudrate;
> + uint32_t namespace_string_length;
> + uint32_t namespace_string_offset;
> + char namespace_string[];
> } AcpiSpcrData;
>
> #define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0)
> diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> index a3784155cb..68c0f2dbee 100644
> --- a/include/hw/acpi/aml-build.h
> +++ b/include/hw/acpi/aml-build.h
> @@ -500,5 +500,5 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog,
>
> void build_spcr(GArray *table_data, BIOSLinker *linker,
> const AcpiSpcrData *f, const uint8_t rev,
> - const char *oem_id, const char *oem_table_id);
> + const char *oem_id, const char *oem_table_id, const char *name);
> #endif
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format
2024-05-07 5:22 ` [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format Sia Jee Heng
2024-05-13 4:01 ` Alistair Francis
2024-05-13 5:16 ` Sunil V L
@ 2024-05-13 6:31 ` Michael S. Tsirkin
2024-05-14 11:18 ` JeeHeng Sia
2 siblings, 1 reply; 13+ messages in thread
From: Michael S. Tsirkin @ 2024-05-13 6:31 UTC (permalink / raw)
To: Sia Jee Heng
Cc: qemu-arm, qemu-devel, qemu-riscv, imammedo, anisinha,
peter.maydell, shannon.zhaosl, sunilvl, palmer, alistair.francis,
bin.meng, liwei1518, dbarboza, zhiwei_liu
On Mon, May 06, 2024 at 10:22:11PM -0700, Sia Jee Heng wrote:
> Update the SPCR table to accommodate the SPCR Table version 4 [1].
> The SPCR table has been modified to adhere to the version 4 format [2].
>
> [1]: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
> [2]: https://github.com/acpica/acpica/pull/931
>
> Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
What does this achieve? We don't normally change unless it gets
us some useful feature.
> ---
> hw/acpi/aml-build.c | 14 +++++++++++---
> hw/arm/virt-acpi-build.c | 10 ++++++++--
> hw/riscv/virt-acpi-build.c | 12 +++++++++---
> include/hw/acpi/acpi-defs.h | 7 +++++--
> include/hw/acpi/aml-build.h | 2 +-
> 5 files changed, 34 insertions(+), 11 deletions(-)
>
> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
> index 6d4517cfbe..7c43573eef 100644
> --- a/hw/acpi/aml-build.c
> +++ b/hw/acpi/aml-build.c
> @@ -1996,7 +1996,7 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
>
> void build_spcr(GArray *table_data, BIOSLinker *linker,
> const AcpiSpcrData *f, const uint8_t rev,
> - const char *oem_id, const char *oem_table_id)
> + const char *oem_id, const char *oem_table_id, const char *name)
> {
> AcpiTable table = { .sig = "SPCR", .rev = rev, .oem_id = oem_id,
> .oem_table_id = oem_table_id };
> @@ -2042,8 +2042,16 @@ void build_spcr(GArray *table_data, BIOSLinker *linker,
> build_append_int_noprefix(table_data, f->pci_flags, 4);
> /* PCI Segment */
> build_append_int_noprefix(table_data, f->pci_segment, 1);
> - /* Reserved */
> - build_append_int_noprefix(table_data, 0, 4);
> + /* UartClkFreq */
> + build_append_int_noprefix(table_data, f->uart_clk_freq, 4);
> + /* PreciseBaudrate */
> + build_append_int_noprefix(table_data, f->precise_baudrate, 4);
> + /* NameSpaceStringLength */
> + build_append_int_noprefix(table_data, f->namespace_string_length, 2);
> + /* NameSpaceStringOffset */
> + build_append_int_noprefix(table_data, f->namespace_string_offset, 2);
> + /* NamespaceString[] */
> + g_array_append_vals(table_data, name, f->namespace_string_length);
>
> acpi_table_end(linker, &table);
> }
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 6a1bde61ce..cb345e8659 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -428,11 +428,12 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>
> /*
> * Serial Port Console Redirection Table (SPCR)
> - * Rev: 1.07
> + * Rev: 1.10
> */
> static void
> spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> {
> + const char name[] = ".";
> AcpiSpcrData serial = {
> .interface_type = 3, /* ARM PL011 UART */
> .base_addr.id = AML_AS_SYSTEM_MEMORY,
> @@ -456,9 +457,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> .pci_function = 0,
> .pci_flags = 0,
> .pci_segment = 0,
> + .uart_clk_freq = 0,
> + .precise_baudrate = 0,
> + .namespace_string_length = sizeof(name),
> + .namespace_string_offset = 88,
> };
>
> - build_spcr(table_data, linker, &serial, 2, vms->oem_id, vms->oem_table_id);
> + build_spcr(table_data, linker, &serial, 4, vms->oem_id, vms->oem_table_id,
> + name);
> }
>
> /*
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index 0925528160..5fa3942491 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -176,14 +176,15 @@ acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
>
> /*
> * Serial Port Console Redirection Table (SPCR)
> - * Rev: 1.07
> + * Rev: 1.10
> */
>
> static void
> spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
> {
> + const char name[] = ".";
> AcpiSpcrData serial = {
> - .interface_type = 0, /* 16550 compatible */
> + .interface_type = 0x12, /* 16550 compatible */
> .base_addr.id = AML_AS_SYSTEM_MEMORY,
> .base_addr.width = 32,
> .base_addr.offset = 0,
> @@ -205,9 +206,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
> .pci_function = 0,
> .pci_flags = 0,
> .pci_segment = 0,
> + .uart_clk_freq = 0,
> + .precise_baudrate = 0,
> + .namespace_string_length = sizeof(name),
> + .namespace_string_offset = 88,
> };
>
> - build_spcr(table_data, linker, &serial, 2, s->oem_id, s->oem_table_id);
> + build_spcr(table_data, linker, &serial, 4, s->oem_id, s->oem_table_id,
> + name);
> }
>
> /* RHCT Node[N] starts at offset 56 */
> diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
> index 0e6e82b339..2e6e341998 100644
> --- a/include/hw/acpi/acpi-defs.h
> +++ b/include/hw/acpi/acpi-defs.h
> @@ -112,7 +112,6 @@ typedef struct AcpiSpcrData {
> uint8_t flow_control;
> uint8_t terminal_type;
> uint8_t language;
> - uint8_t reserved1;
> uint16_t pci_device_id; /* Must be 0xffff if not PCI device */
> uint16_t pci_vendor_id; /* Must be 0xffff if not PCI device */
> uint8_t pci_bus;
> @@ -120,7 +119,11 @@ typedef struct AcpiSpcrData {
> uint8_t pci_function;
> uint32_t pci_flags;
> uint8_t pci_segment;
> - uint32_t reserved2;
> + uint32_t uart_clk_freq;
> + uint32_t precise_baudrate;
> + uint32_t namespace_string_length;
> + uint32_t namespace_string_offset;
> + char namespace_string[];
> } AcpiSpcrData;
>
> #define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0)
> diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> index a3784155cb..68c0f2dbee 100644
> --- a/include/hw/acpi/aml-build.h
> +++ b/include/hw/acpi/aml-build.h
> @@ -500,5 +500,5 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog,
>
> void build_spcr(GArray *table_data, BIOSLinker *linker,
> const AcpiSpcrData *f, const uint8_t rev,
> - const char *oem_id, const char *oem_table_id);
> + const char *oem_id, const char *oem_table_id, const char *name);
> #endif
> --
> 2.34.1
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 1/3] qtest: allow SPCR acpi table changes
2024-05-13 3:55 ` Alistair Francis
@ 2024-05-13 6:31 ` Michael S. Tsirkin
2024-05-13 10:36 ` Alistair Francis
0 siblings, 1 reply; 13+ messages in thread
From: Michael S. Tsirkin @ 2024-05-13 6:31 UTC (permalink / raw)
To: Alistair Francis
Cc: Sia Jee Heng, qemu-arm, qemu-devel, qemu-riscv, imammedo,
anisinha, peter.maydell, shannon.zhaosl, sunilvl, palmer,
alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu
On Mon, May 13, 2024 at 01:55:50PM +1000, Alistair Francis wrote:
> On Tue, May 7, 2024 at 3:24 PM Sia Jee Heng
> <jeeheng.sia@starfivetech.com> wrote:
>
> Can you describe why you are doing this and that it will be reverted
> in the commit message?
>
> Alistair
What motivation are you asking? This follows the normal acpi test update
procedure.
> >
> > Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
> > ---
> > tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
> > index dfb8523c8b..3f12ca546b 100644
> > --- a/tests/qtest/bios-tables-test-allowed-diff.h
> > +++ b/tests/qtest/bios-tables-test-allowed-diff.h
> > @@ -1 +1,3 @@
> > /* List of comma-separated changed AML files to ignore */
> > +"tests/data/acpi/virt/riscv64/SPCR",
> > +"tests/data/acpi/virt/aarch64/SPCR",
> > --
> > 2.34.1
> >
> >
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 1/3] qtest: allow SPCR acpi table changes
2024-05-13 6:31 ` Michael S. Tsirkin
@ 2024-05-13 10:36 ` Alistair Francis
2024-05-14 9:22 ` Peter Maydell
0 siblings, 1 reply; 13+ messages in thread
From: Alistair Francis @ 2024-05-13 10:36 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Sia Jee Heng, qemu-arm, qemu-devel, qemu-riscv, imammedo,
anisinha, peter.maydell, shannon.zhaosl, sunilvl, palmer,
alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu
On Mon, May 13, 2024 at 4:32 PM Michael S. Tsirkin <mst@redhat.com> wrote:
>
> On Mon, May 13, 2024 at 01:55:50PM +1000, Alistair Francis wrote:
> > On Tue, May 7, 2024 at 3:24 PM Sia Jee Heng
> > <jeeheng.sia@starfivetech.com> wrote:
> >
> > Can you describe why you are doing this and that it will be reverted
> > in the commit message?
> >
> > Alistair
>
> What motivation are you asking? This follows the normal acpi test update
> procedure.
I find it clearer to have commits describe that they are disabling
tests for a specific reason. That way it's easier to track what's
going on.
If ACPI test updates don't usually do that then that's fine with me
Alistair
>
> > >
> > > Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
> > > ---
> > > tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
> > > 1 file changed, 2 insertions(+)
> > >
> > > diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
> > > index dfb8523c8b..3f12ca546b 100644
> > > --- a/tests/qtest/bios-tables-test-allowed-diff.h
> > > +++ b/tests/qtest/bios-tables-test-allowed-diff.h
> > > @@ -1 +1,3 @@
> > > /* List of comma-separated changed AML files to ignore */
> > > +"tests/data/acpi/virt/riscv64/SPCR",
> > > +"tests/data/acpi/virt/aarch64/SPCR",
> > > --
> > > 2.34.1
> > >
> > >
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 1/3] qtest: allow SPCR acpi table changes
2024-05-13 10:36 ` Alistair Francis
@ 2024-05-14 9:22 ` Peter Maydell
0 siblings, 0 replies; 13+ messages in thread
From: Peter Maydell @ 2024-05-14 9:22 UTC (permalink / raw)
To: Alistair Francis
Cc: Michael S. Tsirkin, Sia Jee Heng, qemu-arm, qemu-devel,
qemu-riscv, imammedo, anisinha, shannon.zhaosl, sunilvl, palmer,
alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu
On Mon, 13 May 2024 at 11:36, Alistair Francis <alistair23@gmail.com> wrote:
>
> On Mon, May 13, 2024 at 4:32 PM Michael S. Tsirkin <mst@redhat.com> wrote:
> >
> > On Mon, May 13, 2024 at 01:55:50PM +1000, Alistair Francis wrote:
> > > On Tue, May 7, 2024 at 3:24 PM Sia Jee Heng
> > > <jeeheng.sia@starfivetech.com> wrote:
> > >
> > > Can you describe why you are doing this and that it will be reverted
> > > in the commit message?
> > >
> > > Alistair
> >
> > What motivation are you asking? This follows the normal acpi test update
> > procedure.
>
> I find it clearer to have commits describe that they are disabling
> tests for a specific reason. That way it's easier to track what's
> going on.
>
> If ACPI test updates don't usually do that then that's fine with me
The only reason for the existence of this ignore-these-blobs file
is for the purpose of the commit sequence:
* add the blobs to the whitelist
* make a change that alters what the expected blobs are
* regenerate the golden-reference blobs and remove the items
from the whitelist
So we don't usually say much in the commit that is adding a blob
to the whitelist.
thanks
-- PMM
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format
2024-05-13 5:16 ` Sunil V L
@ 2024-05-14 11:16 ` JeeHeng Sia
0 siblings, 0 replies; 13+ messages in thread
From: JeeHeng Sia @ 2024-05-14 11:16 UTC (permalink / raw)
To: Sunil V L
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
mst@redhat.com, imammedo@redhat.com, anisinha@redhat.com,
peter.maydell@linaro.org, shannon.zhaosl@gmail.com,
palmer@dabbelt.com, alistair.francis@wdc.com,
bin.meng@windriver.com, liwei1518@gmail.com,
dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com
> -----Original Message-----
> From: Sunil V L <sunilvl@ventanamicro.com>
> Sent: Monday, May 13, 2024 1:16 PM
> To: JeeHeng Sia <jeeheng.sia@starfivetech.com>
> Cc: qemu-arm@nongnu.org; qemu-devel@nongnu.org; qemu-riscv@nongnu.org; mst@redhat.com; imammedo@redhat.com;
> anisinha@redhat.com; peter.maydell@linaro.org; shannon.zhaosl@gmail.com; palmer@dabbelt.com; alistair.francis@wdc.com;
> bin.meng@windriver.com; liwei1518@gmail.com; dbarboza@ventanamicro.com; zhiwei_liu@linux.alibaba.com
> Subject: Re: [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format
>
> Hi Sia Jee Heng,
>
> On Mon, May 06, 2024 at 10:22:11PM -0700, Sia Jee Heng wrote:
> > Update the SPCR table to accommodate the SPCR Table version 4 [1].
> > The SPCR table has been modified to adhere to the version 4 format [2].
> >
> > [1]: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
> > [2]: https://github.com/acpica/acpica/pull/931
> >
> > Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
> > ---
> > hw/acpi/aml-build.c | 14 +++++++++++---
> > hw/arm/virt-acpi-build.c | 10 ++++++++--
> > hw/riscv/virt-acpi-build.c | 12 +++++++++---
> > include/hw/acpi/acpi-defs.h | 7 +++++--
> > include/hw/acpi/aml-build.h | 2 +-
> > 5 files changed, 34 insertions(+), 11 deletions(-)
> >
> > diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
> > index 6d4517cfbe..7c43573eef 100644
> > --- a/hw/acpi/aml-build.c
> > +++ b/hw/acpi/aml-build.c
> > @@ -1996,7 +1996,7 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
> >
> > void build_spcr(GArray *table_data, BIOSLinker *linker,
> > const AcpiSpcrData *f, const uint8_t rev,
> > - const char *oem_id, const char *oem_table_id)
> > + const char *oem_id, const char *oem_table_id, const char *name)
> > {
> > AcpiTable table = { .sig = "SPCR", .rev = rev, .oem_id = oem_id,
> > .oem_table_id = oem_table_id };
> > @@ -2042,8 +2042,16 @@ void build_spcr(GArray *table_data, BIOSLinker *linker,
> > build_append_int_noprefix(table_data, f->pci_flags, 4);
> > /* PCI Segment */
> > build_append_int_noprefix(table_data, f->pci_segment, 1);
> > - /* Reserved */
> > - build_append_int_noprefix(table_data, 0, 4);
> > + /* UartClkFreq */
> > + build_append_int_noprefix(table_data, f->uart_clk_freq, 4);
> > + /* PreciseBaudrate */
> > + build_append_int_noprefix(table_data, f->precise_baudrate, 4);
> > + /* NameSpaceStringLength */
> > + build_append_int_noprefix(table_data, f->namespace_string_length, 2);
> > + /* NameSpaceStringOffset */
> > + build_append_int_noprefix(table_data, f->namespace_string_offset, 2);
> > + /* NamespaceString[] */
> > + g_array_append_vals(table_data, name, f->namespace_string_length);
> >
> Is it possible to check the revision here and add new fields only if the
> revision supports it? ARM maintainers are better to comment but IMO, we
> better keep ARM's SPCR in the same current version since I don't know
> how consumers like linux (and other OSs) react to the change.
Hi Sunil, there is only one prebuilt SPCR binary. By doing this, the qtest
will fail. I think I will let ARM maintainer to comment.
>
> Thanks!
> Sunil
> > acpi_table_end(linker, &table);
> > }
> > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> > index 6a1bde61ce..cb345e8659 100644
> > --- a/hw/arm/virt-acpi-build.c
> > +++ b/hw/arm/virt-acpi-build.c
> > @@ -428,11 +428,12 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> >
> > /*
> > * Serial Port Console Redirection Table (SPCR)
> > - * Rev: 1.07
> > + * Rev: 1.10
> > */
> > static void
> > spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> > {
> > + const char name[] = ".";
> > AcpiSpcrData serial = {
> > .interface_type = 3, /* ARM PL011 UART */
> > .base_addr.id = AML_AS_SYSTEM_MEMORY,
> > @@ -456,9 +457,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> > .pci_function = 0,
> > .pci_flags = 0,
> > .pci_segment = 0,
> > + .uart_clk_freq = 0,
> > + .precise_baudrate = 0,
> > + .namespace_string_length = sizeof(name),
> > + .namespace_string_offset = 88,
> > };
> >
> > - build_spcr(table_data, linker, &serial, 2, vms->oem_id, vms->oem_table_id);
> > + build_spcr(table_data, linker, &serial, 4, vms->oem_id, vms->oem_table_id,
> > + name);
> > }
> >
> > /*
> > diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> > index 0925528160..5fa3942491 100644
> > --- a/hw/riscv/virt-acpi-build.c
> > +++ b/hw/riscv/virt-acpi-build.c
> > @@ -176,14 +176,15 @@ acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
> >
> > /*
> > * Serial Port Console Redirection Table (SPCR)
> > - * Rev: 1.07
> > + * Rev: 1.10
> > */
> >
> > static void
> > spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
> > {
> > + const char name[] = ".";
> > AcpiSpcrData serial = {
> > - .interface_type = 0, /* 16550 compatible */
> > + .interface_type = 0x12, /* 16550 compatible */
> > .base_addr.id = AML_AS_SYSTEM_MEMORY,
> > .base_addr.width = 32,
> > .base_addr.offset = 0,
> > @@ -205,9 +206,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
> > .pci_function = 0,
> > .pci_flags = 0,
> > .pci_segment = 0,
> > + .uart_clk_freq = 0,
> > + .precise_baudrate = 0,
> > + .namespace_string_length = sizeof(name),
> > + .namespace_string_offset = 88,
> > };
> >
> > - build_spcr(table_data, linker, &serial, 2, s->oem_id, s->oem_table_id);
> > + build_spcr(table_data, linker, &serial, 4, s->oem_id, s->oem_table_id,
> > + name);
> > }
> >
> > /* RHCT Node[N] starts at offset 56 */
> > diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
> > index 0e6e82b339..2e6e341998 100644
> > --- a/include/hw/acpi/acpi-defs.h
> > +++ b/include/hw/acpi/acpi-defs.h
> > @@ -112,7 +112,6 @@ typedef struct AcpiSpcrData {
> > uint8_t flow_control;
> > uint8_t terminal_type;
> > uint8_t language;
> > - uint8_t reserved1;
> > uint16_t pci_device_id; /* Must be 0xffff if not PCI device */
> > uint16_t pci_vendor_id; /* Must be 0xffff if not PCI device */
> > uint8_t pci_bus;
> > @@ -120,7 +119,11 @@ typedef struct AcpiSpcrData {
> > uint8_t pci_function;
> > uint32_t pci_flags;
> > uint8_t pci_segment;
> > - uint32_t reserved2;
> > + uint32_t uart_clk_freq;
> > + uint32_t precise_baudrate;
> > + uint32_t namespace_string_length;
> > + uint32_t namespace_string_offset;
> > + char namespace_string[];
> > } AcpiSpcrData;
> >
> > #define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0)
> > diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> > index a3784155cb..68c0f2dbee 100644
> > --- a/include/hw/acpi/aml-build.h
> > +++ b/include/hw/acpi/aml-build.h
> > @@ -500,5 +500,5 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog,
> >
> > void build_spcr(GArray *table_data, BIOSLinker *linker,
> > const AcpiSpcrData *f, const uint8_t rev,
> > - const char *oem_id, const char *oem_table_id);
> > + const char *oem_id, const char *oem_table_id, const char *name);
> > #endif
> > --
> > 2.34.1
> >
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format
2024-05-13 6:31 ` Michael S. Tsirkin
@ 2024-05-14 11:18 ` JeeHeng Sia
0 siblings, 0 replies; 13+ messages in thread
From: JeeHeng Sia @ 2024-05-14 11:18 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
imammedo@redhat.com, anisinha@redhat.com,
peter.maydell@linaro.org, shannon.zhaosl@gmail.com,
sunilvl@ventanamicro.com, palmer@dabbelt.com,
alistair.francis@wdc.com, bin.meng@windriver.com,
liwei1518@gmail.com, dbarboza@ventanamicro.com,
zhiwei_liu@linux.alibaba.com
> -----Original Message-----
> From: Michael S. Tsirkin <mst@redhat.com>
> Sent: Monday, May 13, 2024 2:31 PM
> To: JeeHeng Sia <jeeheng.sia@starfivetech.com>
> Cc: qemu-arm@nongnu.org; qemu-devel@nongnu.org; qemu-riscv@nongnu.org; imammedo@redhat.com; anisinha@redhat.com;
> peter.maydell@linaro.org; shannon.zhaosl@gmail.com; sunilvl@ventanamicro.com; palmer@dabbelt.com; alistair.francis@wdc.com;
> bin.meng@windriver.com; liwei1518@gmail.com; dbarboza@ventanamicro.com; zhiwei_liu@linux.alibaba.com
> Subject: Re: [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format
>
> On Mon, May 06, 2024 at 10:22:11PM -0700, Sia Jee Heng wrote:
> > Update the SPCR table to accommodate the SPCR Table version 4 [1].
> > The SPCR table has been modified to adhere to the version 4 format [2].
> >
> > [1]: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
> > [2]: https://github.com/acpica/acpica/pull/931
> >
> > Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
>
> What does this achieve? We don't normally change unless it gets
> us some useful feature.
The changes in Table 4 primarily include the addition of RISC-V support
and modifications to the Interrupt Type field. Additionally, new fields
added are Precise Baud Rate, NamespaceStringLength, NamespaceStringOffset,
and NamespaceString[].
>
>
> > ---
> > hw/acpi/aml-build.c | 14 +++++++++++---
> > hw/arm/virt-acpi-build.c | 10 ++++++++--
> > hw/riscv/virt-acpi-build.c | 12 +++++++++---
> > include/hw/acpi/acpi-defs.h | 7 +++++--
> > include/hw/acpi/aml-build.h | 2 +-
> > 5 files changed, 34 insertions(+), 11 deletions(-)
> >
> > diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
> > index 6d4517cfbe..7c43573eef 100644
> > --- a/hw/acpi/aml-build.c
> > +++ b/hw/acpi/aml-build.c
> > @@ -1996,7 +1996,7 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
> >
> > void build_spcr(GArray *table_data, BIOSLinker *linker,
> > const AcpiSpcrData *f, const uint8_t rev,
> > - const char *oem_id, const char *oem_table_id)
> > + const char *oem_id, const char *oem_table_id, const char *name)
> > {
> > AcpiTable table = { .sig = "SPCR", .rev = rev, .oem_id = oem_id,
> > .oem_table_id = oem_table_id };
> > @@ -2042,8 +2042,16 @@ void build_spcr(GArray *table_data, BIOSLinker *linker,
> > build_append_int_noprefix(table_data, f->pci_flags, 4);
> > /* PCI Segment */
> > build_append_int_noprefix(table_data, f->pci_segment, 1);
> > - /* Reserved */
> > - build_append_int_noprefix(table_data, 0, 4);
> > + /* UartClkFreq */
> > + build_append_int_noprefix(table_data, f->uart_clk_freq, 4);
> > + /* PreciseBaudrate */
> > + build_append_int_noprefix(table_data, f->precise_baudrate, 4);
> > + /* NameSpaceStringLength */
> > + build_append_int_noprefix(table_data, f->namespace_string_length, 2);
> > + /* NameSpaceStringOffset */
> > + build_append_int_noprefix(table_data, f->namespace_string_offset, 2);
> > + /* NamespaceString[] */
> > + g_array_append_vals(table_data, name, f->namespace_string_length);
> >
> > acpi_table_end(linker, &table);
> > }
> > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> > index 6a1bde61ce..cb345e8659 100644
> > --- a/hw/arm/virt-acpi-build.c
> > +++ b/hw/arm/virt-acpi-build.c
> > @@ -428,11 +428,12 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> >
> > /*
> > * Serial Port Console Redirection Table (SPCR)
> > - * Rev: 1.07
> > + * Rev: 1.10
> > */
> > static void
> > spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> > {
> > + const char name[] = ".";
> > AcpiSpcrData serial = {
> > .interface_type = 3, /* ARM PL011 UART */
> > .base_addr.id = AML_AS_SYSTEM_MEMORY,
> > @@ -456,9 +457,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> > .pci_function = 0,
> > .pci_flags = 0,
> > .pci_segment = 0,
> > + .uart_clk_freq = 0,
> > + .precise_baudrate = 0,
> > + .namespace_string_length = sizeof(name),
> > + .namespace_string_offset = 88,
> > };
> >
> > - build_spcr(table_data, linker, &serial, 2, vms->oem_id, vms->oem_table_id);
> > + build_spcr(table_data, linker, &serial, 4, vms->oem_id, vms->oem_table_id,
> > + name);
> > }
> >
> > /*
> > diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> > index 0925528160..5fa3942491 100644
> > --- a/hw/riscv/virt-acpi-build.c
> > +++ b/hw/riscv/virt-acpi-build.c
> > @@ -176,14 +176,15 @@ acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
> >
> > /*
> > * Serial Port Console Redirection Table (SPCR)
> > - * Rev: 1.07
> > + * Rev: 1.10
> > */
> >
> > static void
> > spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
> > {
> > + const char name[] = ".";
> > AcpiSpcrData serial = {
> > - .interface_type = 0, /* 16550 compatible */
> > + .interface_type = 0x12, /* 16550 compatible */
> > .base_addr.id = AML_AS_SYSTEM_MEMORY,
> > .base_addr.width = 32,
> > .base_addr.offset = 0,
> > @@ -205,9 +206,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
> > .pci_function = 0,
> > .pci_flags = 0,
> > .pci_segment = 0,
> > + .uart_clk_freq = 0,
> > + .precise_baudrate = 0,
> > + .namespace_string_length = sizeof(name),
> > + .namespace_string_offset = 88,
> > };
> >
> > - build_spcr(table_data, linker, &serial, 2, s->oem_id, s->oem_table_id);
> > + build_spcr(table_data, linker, &serial, 4, s->oem_id, s->oem_table_id,
> > + name);
> > }
> >
> > /* RHCT Node[N] starts at offset 56 */
> > diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
> > index 0e6e82b339..2e6e341998 100644
> > --- a/include/hw/acpi/acpi-defs.h
> > +++ b/include/hw/acpi/acpi-defs.h
> > @@ -112,7 +112,6 @@ typedef struct AcpiSpcrData {
> > uint8_t flow_control;
> > uint8_t terminal_type;
> > uint8_t language;
> > - uint8_t reserved1;
> > uint16_t pci_device_id; /* Must be 0xffff if not PCI device */
> > uint16_t pci_vendor_id; /* Must be 0xffff if not PCI device */
> > uint8_t pci_bus;
> > @@ -120,7 +119,11 @@ typedef struct AcpiSpcrData {
> > uint8_t pci_function;
> > uint32_t pci_flags;
> > uint8_t pci_segment;
> > - uint32_t reserved2;
> > + uint32_t uart_clk_freq;
> > + uint32_t precise_baudrate;
> > + uint32_t namespace_string_length;
> > + uint32_t namespace_string_offset;
> > + char namespace_string[];
> > } AcpiSpcrData;
> >
> > #define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0)
> > diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> > index a3784155cb..68c0f2dbee 100644
> > --- a/include/hw/acpi/aml-build.h
> > +++ b/include/hw/acpi/aml-build.h
> > @@ -500,5 +500,5 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog,
> >
> > void build_spcr(GArray *table_data, BIOSLinker *linker,
> > const AcpiSpcrData *f, const uint8_t rev,
> > - const char *oem_id, const char *oem_table_id);
> > + const char *oem_id, const char *oem_table_id, const char *name);
> > #endif
> > --
> > 2.34.1
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2024-05-14 11:19 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-05-07 5:22 [PATCH v2 0/3] Upgrade ACPI SPCR table to support SPCR table version 4 format Sia Jee Heng
2024-05-07 5:22 ` [PATCH v2 1/3] qtest: allow SPCR acpi table changes Sia Jee Heng
2024-05-13 3:55 ` Alistair Francis
2024-05-13 6:31 ` Michael S. Tsirkin
2024-05-13 10:36 ` Alistair Francis
2024-05-14 9:22 ` Peter Maydell
2024-05-07 5:22 ` [PATCH v2 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format Sia Jee Heng
2024-05-13 4:01 ` Alistair Francis
2024-05-13 5:16 ` Sunil V L
2024-05-14 11:16 ` JeeHeng Sia
2024-05-13 6:31 ` Michael S. Tsirkin
2024-05-14 11:18 ` JeeHeng Sia
2024-05-07 5:22 ` [PATCH v2 3/3] tests/qtest/bios-tables-test: Update virt SPCR golden references Sia Jee Heng
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).