From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Michael Tokarev <mjt@tls.msk.ru>,
Laurent Vivier <laurent@vivier.eu>,
Jean-Christophe Dubois <jcd@tribudubois.net>,
qemu-trivial@nongnu.org, qemu-arm@nongnu.org,
Bernhard Beschow <shentey@gmail.com>
Subject: [PATCH 1/3] hw/rtc/ds1338: Trace send and receive operations
Date: Mon, 13 May 2024 12:11:06 +0200 [thread overview]
Message-ID: <20240513101108.5237-2-shentey@gmail.com> (raw)
In-Reply-To: <20240513101108.5237-1-shentey@gmail.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
hw/rtc/ds1338.c | 6 ++++++
hw/rtc/trace-events | 4 ++++
2 files changed, 10 insertions(+)
diff --git a/hw/rtc/ds1338.c b/hw/rtc/ds1338.c
index e479661c39..ec1b6c40b1 100644
--- a/hw/rtc/ds1338.c
+++ b/hw/rtc/ds1338.c
@@ -17,6 +17,7 @@
#include "qemu/module.h"
#include "qom/object.h"
#include "sysemu/rtc.h"
+#include "trace.h"
/* Size of NVRAM including both the user-accessible area and the
* secondary register area.
@@ -126,6 +127,9 @@ static uint8_t ds1338_recv(I2CSlave *i2c)
uint8_t res;
res = s->nvram[s->ptr];
+
+ trace_ds1338_recv(s->ptr, res);
+
inc_regptr(s);
return res;
}
@@ -134,6 +138,8 @@ static int ds1338_send(I2CSlave *i2c, uint8_t data)
{
DS1338State *s = DS1338(i2c);
+ trace_ds1338_send(s->ptr, data);
+
if (s->addr_byte) {
s->ptr = data & (NVRAM_SIZE - 1);
s->addr_byte = false;
diff --git a/hw/rtc/trace-events b/hw/rtc/trace-events
index ebb311a5b0..8012afe102 100644
--- a/hw/rtc/trace-events
+++ b/hw/rtc/trace-events
@@ -22,6 +22,10 @@ pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
+# ds1338.c
+ds1338_recv(uint32_t addr, uint8_t value) "[0x%" PRIx32 "] -> 0x%02" PRIx8
+ds1338_send(uint32_t addr, uint8_t value) "[0x%" PRIx32 "] <- 0x%02" PRIx8
+
# m48t59.c
m48txx_nvram_io_read(uint64_t addr, uint64_t value) "io read addr:0x%04" PRIx64 " value:0x%02" PRIx64
m48txx_nvram_io_write(uint64_t addr, uint64_t value) "io write addr:0x%04" PRIx64 " value:0x%02" PRIx64
--
2.45.0
next prev parent reply other threads:[~2024-05-13 10:12 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-13 10:11 [PATCH 0/3] Trivial ARM changes Bernhard Beschow
2024-05-13 10:11 ` Bernhard Beschow [this message]
2024-05-13 11:26 ` [PATCH 1/3] hw/rtc/ds1338: Trace send and receive operations Philippe Mathieu-Daudé
2024-05-13 10:11 ` [PATCH 2/3] hw/timer/imx_gpt: Convert DPRINTF to trace events Bernhard Beschow
2024-05-13 11:30 ` Philippe Mathieu-Daudé
2024-05-13 18:42 ` Bernhard Beschow
2024-05-13 10:11 ` [PATCH 3/3] hw/watchdog/wdt_imx2: Remove redundant assignment Bernhard Beschow
2024-05-13 11:34 ` Philippe Mathieu-Daudé
2024-05-13 14:43 ` Guenter Roeck
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