From: CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>
To: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "jasowang@redhat.com" <jasowang@redhat.com>,
"zhenzhong.duan@intel.com" <zhenzhong.duan@intel.com>,
"kevin.tian@intel.com" <kevin.tian@intel.com>,
"yi.l.liu@intel.com" <yi.l.liu@intel.com>,
"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
"peterx@redhat.com" <peterx@redhat.com>,
CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>
Subject: [PATCH ats_vtd v2 00/25] ATS support for VT-d
Date: Wed, 15 May 2024 07:14:13 +0000 [thread overview]
Message-ID: <20240515071057.33990-1-clement.mathieu--drif@eviden.com> (raw)
This series belongs to a list of series that add SVM support for VT-d.
As a starting point, we use the series called 'intel_iommu: Enable stage-1 translation' (rfc2) by Zhenzhong Duan and Yi Liu.
Here we focus on the implementation of ATS support in the IOMMU and on a PCI-level
API for ATS to be used by virtual devices.
This work is based on the VT-d specification version 4.1 (March 2023).
Here is a link to a GitHub repository where you can find the following elements :
- Qemu with all the patches for SVM
- ATS
- PRI
- Device IOTLB invalidations
- Requests with already translated addresses
- A demo device
- A simple driver for the demo device
- A userspace program (for testing and demonstration purposes)
https://github.com/BullSequana/Qemu-in-guest-SVM-demo
v2
- handle huge pages better by detecting the page table level at which the translation errors occur
- Changes after review by ZhenZhong Duan :
- Set the access bit after checking permissions
- helper for PASID and ATS : make the commit message more accurate ('present' replaced with 'enabled')
- pcie_pasid_init: add PCI_PASID_CAP_WIDTH_SHIFT and use it instead of PCI_EXT_CAP_PASID_SIZEOF for shifting the pasid width when preparing the capability register
- pci: do not check pci_bus_bypass_iommu after calling pci_device_get_iommu_bus_devfn
- do not alter formatting of IOMMUTLBEntry declaration
- vtd_iova_fl_check_canonical : directly use s->aw_bits instead of aw for the sake of clarity
Clément Mathieu--Drif (25):
intel_iommu: fix FRCD construction macro.
intel_iommu: make types match
intel_iommu: check if the input address is canonical
intel_iommu: set accessed and dirty bits during first stage
translation
intel_iommu: return page walk level even when the translation fails
intel_iommu: extract device IOTLB invalidation logic
intel_iommu: do not consider wait_desc as an invalid descriptor
memory: add permissions in IOMMUAccessFlags
pcie: add helper to declare PASID capability for a pcie device
pcie: helper functions to check if PASID and ATS are enabled
intel_iommu: declare supported PASID size
intel_iommu: add an internal API to find an address space with PASID
intel_iommu: add support for PASID-based device IOTLB invalidation
pci: cache the bus mastering status in the device
pci: add IOMMU operations to get address spaces and memory regions
with PASID
pci: add a pci-level initialization function for iommu notifiers
intel_iommu: implement the get_address_space_pasid iommu operation
intel_iommu: implement the get_memory_region_pasid iommu operation
memory: Allow to store the PASID in IOMMUTLBEntry
intel_iommu: fill the PASID field when creating an instance of
IOMMUTLBEntry
atc: generic ATC that can be used by PCIe devices that support SVM
memory: add an API for ATS support
pci: add a pci-level API for ATS
intel_iommu: set the address mask even when a translation fails
intel_iommu: add support for ATS
hw/i386/intel_iommu.c | 324 +++++++++++---
hw/i386/intel_iommu_internal.h | 21 +-
hw/pci/pci.c | 125 +++++-
hw/pci/pcie.c | 42 ++
include/exec/memory.h | 50 ++-
include/hw/i386/intel_iommu.h | 2 +-
include/hw/pci/pci.h | 99 +++++
include/hw/pci/pci_device.h | 1 +
include/hw/pci/pcie.h | 9 +-
include/hw/pci/pcie_regs.h | 3 +
include/standard-headers/linux/pci_regs.h | 1 +
system/memory.c | 20 +
tests/unit/meson.build | 1 +
tests/unit/test-atc.c | 502 ++++++++++++++++++++++
util/atc.c | 211 +++++++++
util/atc.h | 117 +++++
util/meson.build | 1 +
17 files changed, 1453 insertions(+), 76 deletions(-)
create mode 100644 tests/unit/test-atc.c
create mode 100644 util/atc.c
create mode 100644 util/atc.h
--
2.44.0
next reply other threads:[~2024-05-15 7:16 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-15 7:14 CLEMENT MATHIEU--DRIF [this message]
2024-05-15 7:14 ` [PATCH ats_vtd v2 01/25] intel_iommu: fix FRCD construction macro CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 02/25] intel_iommu: make types match CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 03/25] intel_iommu: check if the input address is canonical CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 04/25] intel_iommu: set accessed and dirty bits during first stage translation CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 05/25] intel_iommu: return page walk level even when the translation fails CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 06/25] intel_iommu: extract device IOTLB invalidation logic CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 07/25] intel_iommu: do not consider wait_desc as an invalid descriptor CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 08/25] memory: add permissions in IOMMUAccessFlags CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 12/25] intel_iommu: add an internal API to find an address space with PASID CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 11/25] intel_iommu: declare supported PASID size CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 10/25] pcie: helper functions to check if PASID and ATS are enabled CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 09/25] pcie: add helper to declare PASID capability for a pcie device CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 13/25] intel_iommu: add support for PASID-based device IOTLB invalidation CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 14/25] pci: cache the bus mastering status in the device CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 15/25] pci: add IOMMU operations to get address spaces and memory regions with PASID CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 16/25] pci: add a pci-level initialization function for iommu notifiers CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 19/25] memory: Allow to store the PASID in IOMMUTLBEntry CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 20/25] intel_iommu: fill the PASID field when creating an instance of IOMMUTLBEntry CLEMENT MATHIEU--DRIF
2024-05-17 10:40 ` Duan, Zhenzhong
2024-05-17 11:11 ` CLEMENT MATHIEU--DRIF
2024-05-21 3:11 ` Duan, Zhenzhong
2024-05-21 5:09 ` CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 17/25] intel_iommu: implement the get_address_space_pasid iommu operation CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 18/25] intel_iommu: implement the get_memory_region_pasid " CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 21/25] atc: generic ATC that can be used by PCIe devices that support SVM CLEMENT MATHIEU--DRIF
2024-05-17 10:44 ` Duan, Zhenzhong
2024-05-17 11:12 ` CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 22/25] memory: add an API for ATS support CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 23/25] pci: add a pci-level API for ATS CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 24/25] intel_iommu: set the address mask even when a translation fails CLEMENT MATHIEU--DRIF
2024-05-15 7:14 ` [PATCH ats_vtd v2 25/25] intel_iommu: add support for ATS CLEMENT MATHIEU--DRIF
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