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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL 06/34] accel/tcg: Record mmio bytes during translation
Date: Wed, 15 May 2024 09:52:19 +0200	[thread overview]
Message-ID: <20240515075247.68024-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240515075247.68024-1-richard.henderson@linaro.org>

This will be able to replace plugin_insn_append, and will
be usable for disassembly.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/exec/translator.h | 12 ++++++++++++
 accel/tcg/translator.c    | 41 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 53 insertions(+)

diff --git a/include/exec/translator.h b/include/exec/translator.h
index 348985c3a3..4a86907ecc 100644
--- a/include/exec/translator.h
+++ b/include/exec/translator.h
@@ -90,6 +90,18 @@ typedef struct DisasContextBase {
     bool plugin_enabled;
     struct TCGOp *insn_start;
     void *host_addr[2];
+
+    /*
+     * Record insn data that we cannot read directly from host memory.
+     * There are only two reasons we cannot use host memory:
+     * (1) We are executing from I/O,
+     * (2) We are executing a synthetic instruction (s390x EX).
+     * In both cases we need record exactly one instruction,
+     * and thus the maximum amount of data we record is limited.
+     */
+    int record_start;
+    int record_len;
+    uint8_t record[32];
 } DisasContextBase;
 
 /**
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
index 18138c61e1..86a1fe17a0 100644
--- a/accel/tcg/translator.c
+++ b/accel/tcg/translator.c
@@ -132,6 +132,8 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
     db->insn_start = NULL;
     db->host_addr[0] = host_pc;
     db->host_addr[1] = NULL;
+    db->record_start = 0;
+    db->record_len = 0;
 
     ops->init_disas_context(db, cpu);
     tcg_debug_assert(db->is_jmp == DISAS_NEXT);  /* no early exit */
@@ -318,6 +320,39 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
     return true;
 }
 
+static void record_save(DisasContextBase *db, vaddr pc,
+                        const void *from, int size)
+{
+    int offset;
+
+    /* Do not record probes before the start of TB. */
+    if (pc < db->pc_first) {
+        return;
+    }
+
+    /*
+     * In translator_access, we verified that pc is within 2 pages
+     * of pc_first, thus this will never overflow.
+     */
+    offset = pc - db->pc_first;
+
+    /*
+     * Either the first or second page may be I/O.  If it is the second,
+     * then the first byte we need to record will be at a non-zero offset.
+     * In either case, we should not need to record but a single insn.
+     */
+    if (db->record_len == 0) {
+        db->record_start = offset;
+        db->record_len = size;
+    } else {
+        assert(offset == db->record_start + db->record_len);
+        assert(db->record_len + size <= sizeof(db->record));
+        db->record_len += size;
+    }
+
+    memcpy(db->record + (offset - db->record_start), from, size);
+}
+
 static void plugin_insn_append(vaddr pc, const void *from, size_t size)
 {
 #ifdef CONFIG_PLUGIN
@@ -345,6 +380,7 @@ uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc)
 
     if (!translator_ld(env, db, &raw, pc, sizeof(raw))) {
         raw = cpu_ldub_code(env, pc);
+        record_save(db, pc, &raw, sizeof(raw));
     }
     plugin_insn_append(pc, &raw, sizeof(raw));
     return raw;
@@ -359,6 +395,7 @@ uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
     } else {
         tgt = cpu_lduw_code(env, pc);
         raw = tswap16(tgt);
+        record_save(db, pc, &raw, sizeof(raw));
     }
     plugin_insn_append(pc, &raw, sizeof(raw));
     return tgt;
@@ -373,6 +410,7 @@ uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
     } else {
         tgt = cpu_ldl_code(env, pc);
         raw = tswap32(tgt);
+        record_save(db, pc, &raw, sizeof(raw));
     }
     plugin_insn_append(pc, &raw, sizeof(raw));
     return tgt;
@@ -387,6 +425,7 @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
     } else {
         tgt = cpu_ldq_code(env, pc);
         raw = tswap64(tgt);
+        record_save(db, pc, &raw, sizeof(raw));
     }
     plugin_insn_append(pc, &raw, sizeof(raw));
     return tgt;
@@ -394,5 +433,7 @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
 
 void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8)
 {
+    assert(pc >= db->pc_first);
+    record_save(db, pc, &insn8, sizeof(insn8));
     plugin_insn_append(pc, &insn8, sizeof(insn8));
 }
-- 
2.34.1



  parent reply	other threads:[~2024-05-15  7:55 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-15  7:52 [PULL 00/34] tcg patch queue Richard Henderson
2024-05-15  7:52 ` [PULL 01/34] accel/tcg: Use vaddr in translator_ld* Richard Henderson
2024-05-15  7:52 ` [PULL 02/34] accel/tcg: Hide in_same_page outside of a target-specific context Richard Henderson
2024-05-15  7:52 ` [PULL 03/34] accel/tcg: Pass DisasContextBase to translator_fake_ldb Richard Henderson
2024-05-15  7:52 ` [PULL 04/34] accel/tcg: Reorg translator_ld* Richard Henderson
2024-05-15  7:52 ` [PULL 05/34] accel/tcg: Cap the translation block when we encounter mmio Richard Henderson
2024-05-15  7:52 ` Richard Henderson [this message]
2024-05-15  7:52 ` [PULL 07/34] accel/tcg: Record when translator_fake_ldb is used Richard Henderson
2024-05-15  7:52 ` [PULL 08/34] accel/tcg: Record DisasContextBase in tcg_ctx for plugins Richard Henderson
2024-05-15  7:52 ` [PULL 09/34] plugins: Copy memory in qemu_plugin_insn_data Richard Henderson
2024-05-15  7:52 ` [PULL 10/34] accel/tcg: Implement translator_st Richard Henderson
2024-05-15  7:52 ` [PULL 11/34] plugins: Use translator_st for qemu_plugin_insn_data Richard Henderson
2024-05-15  7:52 ` [PULL 12/34] plugins: Read mem_only directly from TB cflags Richard Henderson
2024-05-15  7:52 ` [PULL 13/34] plugins: Use DisasContextBase for qemu_plugin_insn_haddr Richard Henderson
2024-05-15  7:52 ` [PULL 14/34] plugins: Use DisasContextBase for qemu_plugin_tb_vaddr Richard Henderson
2024-05-15  7:52 ` [PULL 15/34] plugins: Merge alloc_tcg_plugin_context into plugin_gen_tb_start Richard Henderson
2024-05-15  7:52 ` [PULL 16/34] accel/tcg: Provide default implementation of disas_log Richard Henderson
2024-05-15  7:52 ` [PULL 17/34] accel/tcg: Return bool from TranslatorOps.disas_log Richard Henderson
2024-05-15  7:52 ` [PULL 18/34] disas: Split disas.c Richard Henderson
2024-05-15  7:52 ` [PULL 19/34] disas: Use translator_st to get disassembly data Richard Henderson
2024-05-20 11:50   ` Bernhard Beschow
2024-05-15  7:52 ` [PULL 20/34] accel/tcg: Introduce translator_fake_ld Richard Henderson
2024-05-15  7:52 ` [PULL 21/34] target/s390x: Fix translator_fake_ld length Richard Henderson
2024-05-15  7:52 ` [PULL 22/34] target/s390x: Disassemble EXECUTEd instructions Richard Henderson
2024-05-15  7:52 ` [PULL 23/34] target/hexagon: Use translator_ldl in pkt_crosses_page Richard Henderson
2024-05-15  7:52 ` [PULL 24/34] target/microblaze: Use translator_ldl Richard Henderson
2024-05-15  7:52 ` [PULL 25/34] target/i386: Use translator_ldub for everything Richard Henderson
2024-05-15  7:52 ` [PULL 26/34] target/avr: Use translator_lduw Richard Henderson
2024-05-15  7:52 ` [PULL 27/34] target/cris: Use translator_ld* in cris_fetch Richard Henderson
2024-05-15  7:52 ` [PULL 28/34] target/cris: Use cris_fetch in translate_v10.c.inc Richard Henderson
2024-05-15  7:52 ` [PULL 29/34] target/riscv: Use translator_ld* for everything Richard Henderson
2024-05-15  7:52 ` [PULL 30/34] target/rx: Use translator_ld* Richard Henderson
2024-05-15  7:52 ` [PULL 31/34] target/xtensa: Use translator_ldub in xtensa_insn_len Richard Henderson
2024-05-15  7:52 ` [PULL 32/34] target/s390x: Use translator_lduw in get_next_pc Richard Henderson
2024-05-15  7:52 ` [PULL 33/34] accel/tcg: Remove cpu_ldsb_code / cpu_ldsw_code Richard Henderson
2024-05-15  7:52 ` [PULL 34/34] tcg/loongarch64: Fill out tcg_out_{ld, st} for vector regs Richard Henderson
2024-05-15 12:59 ` [PULL 00/34] tcg patch queue Richard Henderson

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