From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Helge Deller <deller@gmx.de>
Subject: [PULL 13/43] target/hppa: Add space arguments to install_iaq_entries
Date: Wed, 15 May 2024 11:40:13 +0200 [thread overview]
Message-ID: <20240515094043.82850-14-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240515094043.82850-1-richard.henderson@linaro.org>
Move space assighments to a central location.
Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/translate.c | 58 +++++++++++++++++++----------------------
1 file changed, 27 insertions(+), 31 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index b4e384baa3..eed0f92db4 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -624,8 +624,9 @@ static void copy_iaoq_entry(DisasContext *ctx, TCGv_i64 dest,
}
}
-static void install_iaq_entries(DisasContext *ctx, uint64_t bi, TCGv_i64 bv,
- uint64_t ni, TCGv_i64 nv)
+static void install_iaq_entries(DisasContext *ctx,
+ uint64_t bi, TCGv_i64 bv, TCGv_i64 bs,
+ uint64_t ni, TCGv_i64 nv, TCGv_i64 ns)
{
copy_iaoq_entry(ctx, cpu_iaoq_f, bi, bv);
@@ -639,6 +640,12 @@ static void install_iaq_entries(DisasContext *ctx, uint64_t bi, TCGv_i64 bv,
tcg_gen_andi_i64(cpu_iaoq_b, cpu_iaoq_b,
gva_offset_mask(ctx->tb_flags));
}
+ if (bs) {
+ tcg_gen_mov_i64(cpu_iasq_f, bs);
+ }
+ if (ns || bs) {
+ tcg_gen_mov_i64(cpu_iasq_b, ns ? ns : bs);
+ }
}
static void install_link(DisasContext *ctx, unsigned link, bool with_sr0)
@@ -671,7 +678,8 @@ static void gen_excp_1(int exception)
static void gen_excp(DisasContext *ctx, int exception)
{
- install_iaq_entries(ctx, ctx->iaoq_f, cpu_iaoq_f, ctx->iaoq_b, cpu_iaoq_b);
+ install_iaq_entries(ctx, ctx->iaoq_f, cpu_iaoq_f, NULL,
+ ctx->iaoq_b, cpu_iaoq_b, NULL);
nullify_save(ctx);
gen_excp_1(exception);
ctx->base.is_jmp = DISAS_NORETURN;
@@ -725,10 +733,11 @@ static void gen_goto_tb(DisasContext *ctx, int which,
{
if (use_goto_tb(ctx, b, n)) {
tcg_gen_goto_tb(which);
- install_iaq_entries(ctx, b, NULL, n, NULL);
+ install_iaq_entries(ctx, b, NULL, NULL, n, NULL, NULL);
tcg_gen_exit_tb(ctx->base.tb, which);
} else {
- install_iaq_entries(ctx, b, cpu_iaoq_b, n, ctx->iaoq_n_var);
+ install_iaq_entries(ctx, b, cpu_iaoq_b, ctx->iasq_b,
+ n, ctx->iaoq_n_var, ctx->iasq_n);
tcg_gen_lookup_and_goto_ptr();
}
}
@@ -1917,7 +1926,7 @@ static bool do_ibranch(DisasContext *ctx, TCGv_i64 dest,
install_link(ctx, link, false);
if (is_n) {
if (use_nullify_skip(ctx)) {
- install_iaq_entries(ctx, -1, next, -1, NULL);
+ install_iaq_entries(ctx, -1, next, NULL, -1, NULL, NULL);
nullify_set(ctx, 0);
ctx->base.is_jmp = DISAS_IAQ_N_UPDATED;
return true;
@@ -1936,10 +1945,11 @@ static bool do_ibranch(DisasContext *ctx, TCGv_i64 dest,
install_link(ctx, link, false);
if (is_n && use_nullify_skip(ctx)) {
- install_iaq_entries(ctx, -1, next, -1, NULL);
+ install_iaq_entries(ctx, -1, next, NULL, -1, NULL, NULL);
nullify_set(ctx, 0);
} else {
- install_iaq_entries(ctx, ctx->iaoq_b, cpu_iaoq_b, -1, next);
+ install_iaq_entries(ctx, ctx->iaoq_b, cpu_iaoq_b, ctx->iasq_b,
+ -1, next, NULL);
nullify_set(ctx, is_n);
}
@@ -2027,7 +2037,7 @@ static void do_page_zero(DisasContext *ctx)
tcg_gen_st_i64(cpu_gr[26], tcg_env, offsetof(CPUHPPAState, cr[27]));
tmp = tcg_temp_new_i64();
tcg_gen_ori_i64(tmp, cpu_gr[31], 3);
- install_iaq_entries(ctx, -1, tmp, -1, NULL);
+ install_iaq_entries(ctx, -1, tmp, NULL, -1, NULL, NULL);
ctx->base.is_jmp = DISAS_IAQ_N_UPDATED;
break;
@@ -2771,8 +2781,8 @@ static bool trans_or(DisasContext *ctx, arg_rrr_cf_d *a)
nullify_over(ctx);
/* Advance the instruction queue. */
- install_iaq_entries(ctx, ctx->iaoq_b, cpu_iaoq_b,
- ctx->iaoq_n, ctx->iaoq_n_var);
+ install_iaq_entries(ctx, ctx->iaoq_b, cpu_iaoq_b, ctx->iasq_b,
+ ctx->iaoq_n, ctx->iaoq_n_var, ctx->iasq_n);
nullify_set(ctx, 0);
/* Tell the qemu main loop to halt until this cpu has work. */
@@ -3922,16 +3932,11 @@ static bool trans_be(DisasContext *ctx, arg_be *a)
load_spr(ctx, new_spc, a->sp);
install_link(ctx, a->l, true);
if (a->n && use_nullify_skip(ctx)) {
- install_iaq_entries(ctx, -1, tmp, -1, NULL);
- tcg_gen_mov_i64(cpu_iasq_f, new_spc);
- tcg_gen_mov_i64(cpu_iasq_b, new_spc);
+ install_iaq_entries(ctx, -1, tmp, new_spc, -1, NULL, new_spc);
nullify_set(ctx, 0);
} else {
- install_iaq_entries(ctx, ctx->iaoq_b, cpu_iaoq_b, -1, tmp);
- if (ctx->iasq_b) {
- tcg_gen_mov_i64(cpu_iasq_f, ctx->iasq_b);
- }
- tcg_gen_mov_i64(cpu_iasq_b, new_spc);
+ install_iaq_entries(ctx, ctx->iaoq_b, cpu_iaoq_b, ctx->iasq_b,
+ -1, tmp, new_spc);
nullify_set(ctx, a->n);
}
tcg_gen_lookup_and_goto_ptr();
@@ -4042,11 +4047,8 @@ static bool trans_bve(DisasContext *ctx, arg_bve *a)
dest = do_ibranch_priv(ctx, dest);
install_link(ctx, a->l, false);
- install_iaq_entries(ctx, ctx->iaoq_b, cpu_iaoq_b, -1, dest);
- if (ctx->iasq_b) {
- tcg_gen_mov_i64(cpu_iasq_f, ctx->iasq_b);
- }
- tcg_gen_mov_i64(cpu_iasq_b, space_select(ctx, 0, dest));
+ install_iaq_entries(ctx, ctx->iaoq_b, cpu_iaoq_b, ctx->iasq_b,
+ -1, dest, space_select(ctx, 0, dest));
nullify_set(ctx, a->n);
tcg_gen_lookup_and_goto_ptr();
ctx->base.is_jmp = DISAS_NORETURN;
@@ -4782,13 +4784,7 @@ static void hppa_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
}
/* FALLTHRU */
case DISAS_IAQ_N_STALE_EXIT:
- install_iaq_entries(ctx, fi, fv, bi, bv);
- if (fs) {
- tcg_gen_mov_i64(cpu_iasq_f, fs);
- }
- if (bs) {
- tcg_gen_mov_i64(cpu_iasq_b, bs);
- }
+ install_iaq_entries(ctx, fi, fv, fs, bi, bv, bs);
nullify_save(ctx);
if (is_jmp == DISAS_IAQ_N_STALE_EXIT) {
tcg_gen_exit_tb(NULL, 0);
--
2.34.1
next prev parent reply other threads:[~2024-05-15 9:41 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-15 9:40 [PULL 00/43] target/hppa: Misc improvements Richard Henderson
2024-05-15 9:40 ` [PULL 01/43] target/hppa: Move cpu_get_tb_cpu_state out of line Richard Henderson
2024-05-15 9:40 ` [PULL 02/43] target/hppa: Use hppa_form_gva_psw in hppa_cpu_get_pc Richard Henderson
2024-05-15 9:40 ` [PULL 03/43] target/hppa: Move constant destination check into use_goto_tb Richard Henderson
2024-05-15 9:40 ` [PULL 04/43] target/hppa: Pass displacement to do_dbranch Richard Henderson
2024-05-15 9:40 ` [PULL 05/43] target/hppa: Allow prior nullification in do_ibranch Richard Henderson
2024-05-15 9:40 ` [PULL 06/43] target/hppa: Use CF_BP_PAGE instead of cpu_breakpoint_test Richard Henderson
2024-05-15 9:40 ` [PULL 07/43] target/hppa: Add install_iaq_entries Richard Henderson
2024-05-15 9:40 ` [PULL 08/43] target/hppa: Add install_link Richard Henderson
2024-05-15 9:40 ` [PULL 09/43] target/hppa: Delay computation of IAQ_Next Richard Henderson
2024-05-15 9:40 ` [PULL 10/43] target/hppa: Skip nullified insns in unconditional dbranch path Richard Henderson
2024-05-15 9:40 ` [PULL 11/43] target/hppa: Simplify TB end Richard Henderson
2024-05-15 9:40 ` [PULL 12/43] target/hppa: Add IASQ entries to DisasContext Richard Henderson
2024-05-15 9:40 ` Richard Henderson [this message]
2024-05-15 9:40 ` [PULL 14/43] target/hppa: Add space argument to do_ibranch Richard Henderson
2024-05-15 9:40 ` [PULL 15/43] target/hppa: Use umax in do_ibranch_priv Richard Henderson
2024-05-15 9:40 ` [PULL 16/43] target/hppa: Always make a copy " Richard Henderson
2024-05-15 9:40 ` [PULL 17/43] target/hppa: Introduce and use DisasIAQE for branch management Richard Henderson
2024-05-15 9:40 ` [PULL 18/43] target/hppa: Use displacements in DisasIAQE Richard Henderson
2024-05-15 9:40 ` [PULL 19/43] target/hppa: Rename cond_make_* helpers Richard Henderson
2024-05-15 9:40 ` [PULL 20/43] target/hppa: Use TCG_COND_TST* in do_cond Richard Henderson
2024-05-15 9:40 ` [PULL 21/43] target/hppa: Use TCG_COND_TST* in do_log_cond Richard Henderson
2024-05-15 9:40 ` [PULL 22/43] target/hppa: Use TCG_COND_TST* in do_unit_zero_cond Richard Henderson
2024-05-15 9:40 ` [PULL 23/43] target/hppa: Use TCG_COND_TST* in do_unit_addsub Richard Henderson
2024-05-15 9:40 ` [PULL 24/43] target/hppa: Use TCG_COND_TST* in trans_bb_imm Richard Henderson
2024-05-15 9:40 ` [PULL 25/43] target/hppa: Use registerfields.h for FPSR Richard Henderson
2024-05-15 9:40 ` [PULL 26/43] target/hppa: Use TCG_COND_TST* in trans_ftest Richard Henderson
2024-05-15 9:40 ` [PULL 27/43] target/hppa: Remove cond_free Richard Henderson
2024-05-15 9:40 ` [PULL 28/43] target/hppa: Introduce DisasDelayException Richard Henderson
2024-05-15 9:40 ` [PULL 29/43] target/hppa: Use delay_excp for conditional traps Richard Henderson
2024-05-15 9:40 ` [PULL 30/43] target/hppa: Use delay_excp for conditional trap on overflow Richard Henderson
2024-05-15 9:40 ` [PULL 31/43] linux-user/hppa: Force all code addresses to PRIV_USER Richard Henderson
2024-05-15 9:40 ` [PULL 32/43] target/hppa: Store full iaoq_f and page offset of iaoq_b in TB Richard Henderson
2024-05-15 9:40 ` [PULL 33/43] target/hppa: Do not mask in copy_iaoq_entry Richard Henderson
2024-05-15 9:40 ` [PULL 34/43] target/hppa: Improve hppa_cpu_dump_state Richard Henderson
2024-05-15 9:40 ` [PULL 35/43] target/hppa: Split PSW X and B into their own field Richard Henderson
2024-05-15 9:40 ` [PULL 36/43] target/hppa: Manage PSW_X and PSW_B in translator Richard Henderson
2024-05-15 9:40 ` [PULL 37/43] target/hppa: Implement PSW_B Richard Henderson
2024-05-15 9:40 ` [PULL 38/43] target/hppa: Implement PSW_X Richard Henderson
2024-05-15 9:40 ` [PULL 39/43] target/hppa: Drop tlb_entry return from hppa_get_physical_address Richard Henderson
2024-05-15 9:40 ` [PULL 40/43] target/hppa: Adjust priv for B,GATE at runtime Richard Henderson
2024-05-15 9:40 ` [PULL 41/43] target/hppa: Implement CF_PCREL Richard Henderson
2024-05-15 9:40 ` [PULL 42/43] target/hppa: Log cpu state at interrupt Richard Henderson
2024-05-15 9:40 ` [PULL 43/43] target/hppa: Log cpu state on return-from-interrupt Richard Henderson
2024-05-15 12:59 ` [PULL 00/43] target/hppa: Misc improvements Richard Henderson
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