From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Helge Deller <deller@gmx.de>
Subject: [PULL 28/43] target/hppa: Introduce DisasDelayException
Date: Wed, 15 May 2024 11:40:28 +0200 [thread overview]
Message-ID: <20240515094043.82850-29-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240515094043.82850-1-richard.henderson@linaro.org>
Allow an exception to be emitted at the end of the TranslationBlock,
leaving only the conditional branch inline. Use it for simple
exception instructions like break, which happen to be nullified.
Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/translate.c | 60 +++++++++++++++++++++++++++++++++++++----
1 file changed, 55 insertions(+), 5 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 81a75ddf95..706537ea59 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -51,6 +51,17 @@ typedef struct DisasIAQE {
int64_t disp;
} DisasIAQE;
+typedef struct DisasDelayException {
+ struct DisasDelayException *next;
+ TCGLabel *lab;
+ uint32_t insn;
+ bool set_iir;
+ int8_t set_n;
+ uint8_t excp;
+ /* Saved state at parent insn. */
+ DisasIAQE iaq_f, iaq_b;
+} DisasDelayException;
+
typedef struct DisasContext {
DisasContextBase base;
CPUState *cs;
@@ -66,6 +77,7 @@ typedef struct DisasContext {
DisasCond null_cond;
TCGLabel *null_lab;
+ DisasDelayException *delay_excp_list;
TCGv_i64 zero;
uint32_t insn;
@@ -684,13 +696,38 @@ static void gen_excp(DisasContext *ctx, int exception)
ctx->base.is_jmp = DISAS_NORETURN;
}
+static DisasDelayException *delay_excp(DisasContext *ctx, uint8_t excp)
+{
+ DisasDelayException *e = tcg_malloc(sizeof(DisasDelayException));
+
+ memset(e, 0, sizeof(*e));
+ e->next = ctx->delay_excp_list;
+ ctx->delay_excp_list = e;
+
+ e->lab = gen_new_label();
+ e->insn = ctx->insn;
+ e->set_iir = true;
+ e->set_n = ctx->psw_n_nonzero ? 0 : -1;
+ e->excp = excp;
+ e->iaq_f = ctx->iaq_f;
+ e->iaq_b = ctx->iaq_b;
+
+ return e;
+}
+
static bool gen_excp_iir(DisasContext *ctx, int exc)
{
- nullify_over(ctx);
- tcg_gen_st_i64(tcg_constant_i64(ctx->insn),
- tcg_env, offsetof(CPUHPPAState, cr[CR_IIR]));
- gen_excp(ctx, exc);
- return nullify_end(ctx);
+ if (ctx->null_cond.c == TCG_COND_NEVER) {
+ tcg_gen_st_i64(tcg_constant_i64(ctx->insn),
+ tcg_env, offsetof(CPUHPPAState, cr[CR_IIR]));
+ gen_excp(ctx, exc);
+ } else {
+ DisasDelayException *e = delay_excp(ctx, exc);
+ tcg_gen_brcond_i64(tcg_invert_cond(ctx->null_cond.c),
+ ctx->null_cond.a0, ctx->null_cond.a1, e->lab);
+ ctx->null_cond = cond_make_f();
+ }
+ return true;
}
static bool gen_illegal(DisasContext *ctx)
@@ -4697,6 +4734,19 @@ static void hppa_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
default:
g_assert_not_reached();
}
+
+ for (DisasDelayException *e = ctx->delay_excp_list; e ; e = e->next) {
+ gen_set_label(e->lab);
+ if (e->set_n >= 0) {
+ tcg_gen_movi_i64(cpu_psw_n, e->set_n);
+ }
+ if (e->set_iir) {
+ tcg_gen_st_i64(tcg_constant_i64(e->insn), tcg_env,
+ offsetof(CPUHPPAState, cr[CR_IIR]));
+ }
+ install_iaq_entries(ctx, &e->iaq_f, &e->iaq_b);
+ gen_excp_1(e->excp);
+ }
}
static void hppa_tr_disas_log(const DisasContextBase *dcbase,
--
2.34.1
next prev parent reply other threads:[~2024-05-15 9:42 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-15 9:40 [PULL 00/43] target/hppa: Misc improvements Richard Henderson
2024-05-15 9:40 ` [PULL 01/43] target/hppa: Move cpu_get_tb_cpu_state out of line Richard Henderson
2024-05-15 9:40 ` [PULL 02/43] target/hppa: Use hppa_form_gva_psw in hppa_cpu_get_pc Richard Henderson
2024-05-15 9:40 ` [PULL 03/43] target/hppa: Move constant destination check into use_goto_tb Richard Henderson
2024-05-15 9:40 ` [PULL 04/43] target/hppa: Pass displacement to do_dbranch Richard Henderson
2024-05-15 9:40 ` [PULL 05/43] target/hppa: Allow prior nullification in do_ibranch Richard Henderson
2024-05-15 9:40 ` [PULL 06/43] target/hppa: Use CF_BP_PAGE instead of cpu_breakpoint_test Richard Henderson
2024-05-15 9:40 ` [PULL 07/43] target/hppa: Add install_iaq_entries Richard Henderson
2024-05-15 9:40 ` [PULL 08/43] target/hppa: Add install_link Richard Henderson
2024-05-15 9:40 ` [PULL 09/43] target/hppa: Delay computation of IAQ_Next Richard Henderson
2024-05-15 9:40 ` [PULL 10/43] target/hppa: Skip nullified insns in unconditional dbranch path Richard Henderson
2024-05-15 9:40 ` [PULL 11/43] target/hppa: Simplify TB end Richard Henderson
2024-05-15 9:40 ` [PULL 12/43] target/hppa: Add IASQ entries to DisasContext Richard Henderson
2024-05-15 9:40 ` [PULL 13/43] target/hppa: Add space arguments to install_iaq_entries Richard Henderson
2024-05-15 9:40 ` [PULL 14/43] target/hppa: Add space argument to do_ibranch Richard Henderson
2024-05-15 9:40 ` [PULL 15/43] target/hppa: Use umax in do_ibranch_priv Richard Henderson
2024-05-15 9:40 ` [PULL 16/43] target/hppa: Always make a copy " Richard Henderson
2024-05-15 9:40 ` [PULL 17/43] target/hppa: Introduce and use DisasIAQE for branch management Richard Henderson
2024-05-15 9:40 ` [PULL 18/43] target/hppa: Use displacements in DisasIAQE Richard Henderson
2024-05-15 9:40 ` [PULL 19/43] target/hppa: Rename cond_make_* helpers Richard Henderson
2024-05-15 9:40 ` [PULL 20/43] target/hppa: Use TCG_COND_TST* in do_cond Richard Henderson
2024-05-15 9:40 ` [PULL 21/43] target/hppa: Use TCG_COND_TST* in do_log_cond Richard Henderson
2024-05-15 9:40 ` [PULL 22/43] target/hppa: Use TCG_COND_TST* in do_unit_zero_cond Richard Henderson
2024-05-15 9:40 ` [PULL 23/43] target/hppa: Use TCG_COND_TST* in do_unit_addsub Richard Henderson
2024-05-15 9:40 ` [PULL 24/43] target/hppa: Use TCG_COND_TST* in trans_bb_imm Richard Henderson
2024-05-15 9:40 ` [PULL 25/43] target/hppa: Use registerfields.h for FPSR Richard Henderson
2024-05-15 9:40 ` [PULL 26/43] target/hppa: Use TCG_COND_TST* in trans_ftest Richard Henderson
2024-05-15 9:40 ` [PULL 27/43] target/hppa: Remove cond_free Richard Henderson
2024-05-15 9:40 ` Richard Henderson [this message]
2024-05-15 9:40 ` [PULL 29/43] target/hppa: Use delay_excp for conditional traps Richard Henderson
2024-05-15 9:40 ` [PULL 30/43] target/hppa: Use delay_excp for conditional trap on overflow Richard Henderson
2024-05-15 9:40 ` [PULL 31/43] linux-user/hppa: Force all code addresses to PRIV_USER Richard Henderson
2024-05-15 9:40 ` [PULL 32/43] target/hppa: Store full iaoq_f and page offset of iaoq_b in TB Richard Henderson
2024-05-15 9:40 ` [PULL 33/43] target/hppa: Do not mask in copy_iaoq_entry Richard Henderson
2024-05-15 9:40 ` [PULL 34/43] target/hppa: Improve hppa_cpu_dump_state Richard Henderson
2024-05-15 9:40 ` [PULL 35/43] target/hppa: Split PSW X and B into their own field Richard Henderson
2024-05-15 9:40 ` [PULL 36/43] target/hppa: Manage PSW_X and PSW_B in translator Richard Henderson
2024-05-15 9:40 ` [PULL 37/43] target/hppa: Implement PSW_B Richard Henderson
2024-05-15 9:40 ` [PULL 38/43] target/hppa: Implement PSW_X Richard Henderson
2024-05-15 9:40 ` [PULL 39/43] target/hppa: Drop tlb_entry return from hppa_get_physical_address Richard Henderson
2024-05-15 9:40 ` [PULL 40/43] target/hppa: Adjust priv for B,GATE at runtime Richard Henderson
2024-05-15 9:40 ` [PULL 41/43] target/hppa: Implement CF_PCREL Richard Henderson
2024-05-15 9:40 ` [PULL 42/43] target/hppa: Log cpu state at interrupt Richard Henderson
2024-05-15 9:40 ` [PULL 43/43] target/hppa: Log cpu state on return-from-interrupt Richard Henderson
2024-05-15 12:59 ` [PULL 00/43] target/hppa: Misc improvements Richard Henderson
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