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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Helge Deller" <deller@gmx.de>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL 39/43] target/hppa: Drop tlb_entry return from hppa_get_physical_address
Date: Wed, 15 May 2024 11:40:39 +0200	[thread overview]
Message-ID: <20240515094043.82850-40-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240515094043.82850-1-richard.henderson@linaro.org>

The return-by-reference is never used.

Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/hppa/cpu.h        |  3 +--
 target/hppa/int_helper.c |  2 +-
 target/hppa/mem_helper.c | 19 ++++---------------
 target/hppa/op_helper.c  |  3 +--
 4 files changed, 7 insertions(+), 20 deletions(-)

diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index f247ad56d7..78ab0adcd0 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -371,8 +371,7 @@ bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
 void hppa_cpu_do_interrupt(CPUState *cpu);
 bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req);
 int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
-                              int type, hwaddr *pphys, int *pprot,
-                              HPPATLBEntry **tlb_entry);
+                              int type, hwaddr *pphys, int *pprot);
 void hppa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
                                      vaddr addr, unsigned size,
                                      MMUAccessType access_type,
diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c
index 97e5f0b9a7..b82f32fd12 100644
--- a/target/hppa/int_helper.c
+++ b/target/hppa/int_helper.c
@@ -167,7 +167,7 @@ void hppa_cpu_do_interrupt(CPUState *cs)
 
                     vaddr = hppa_form_gva_psw(old_psw, env->iasq_f, vaddr);
                     t = hppa_get_physical_address(env, vaddr, MMU_KERNEL_IDX,
-                                                  0, &paddr, &prot, NULL);
+                                                  0, &paddr, &prot);
                     if (t >= 0) {
                         /* We can't re-load the instruction.  */
                         env->cr[CR_IIR] = 0;
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index ca7bbe0a7c..2929226874 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -197,18 +197,13 @@ static int match_prot_id64(CPUHPPAState *env, uint32_t access_id)
 }
 
 int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
-                              int type, hwaddr *pphys, int *pprot,
-                              HPPATLBEntry **tlb_entry)
+                              int type, hwaddr *pphys, int *pprot)
 {
     hwaddr phys;
     int prot, r_prot, w_prot, x_prot, priv;
     HPPATLBEntry *ent;
     int ret = -1;
 
-    if (tlb_entry) {
-        *tlb_entry = NULL;
-    }
-
     /* Virtual translation disabled.  Map absolute to physical.  */
     if (MMU_IDX_MMU_DISABLED(mmu_idx)) {
         switch (mmu_idx) {
@@ -238,10 +233,6 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
         goto egress;
     }
 
-    if (tlb_entry) {
-        *tlb_entry = ent;
-    }
-
     /* We now know the physical address.  */
     phys = ent->pa + (addr - ent->itree.start);
 
@@ -350,7 +341,7 @@ hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
                cpu->env.psw & PSW_W ? MMU_ABS_W_IDX : MMU_ABS_IDX);
 
     excp = hppa_get_physical_address(&cpu->env, addr, mmu_idx, 0,
-                                     &phys, &prot, NULL);
+                                     &phys, &prot);
 
     /* Since we're translating for debugging, the only error that is a
        hard error is no translation at all.  Otherwise, while a real cpu
@@ -432,7 +423,6 @@ bool hppa_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
 {
     HPPACPU *cpu = HPPA_CPU(cs);
     CPUHPPAState *env = &cpu->env;
-    HPPATLBEntry *ent;
     int prot, excp, a_prot;
     hwaddr phys;
 
@@ -448,8 +438,7 @@ bool hppa_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
         break;
     }
 
-    excp = hppa_get_physical_address(env, addr, mmu_idx,
-                                     a_prot, &phys, &prot, &ent);
+    excp = hppa_get_physical_address(env, addr, mmu_idx, a_prot, &phys, &prot);
     if (unlikely(excp >= 0)) {
         if (probe) {
             return false;
@@ -690,7 +679,7 @@ target_ulong HELPER(lpa)(CPUHPPAState *env, target_ulong addr)
     int prot, excp;
 
     excp = hppa_get_physical_address(env, addr, MMU_KERNEL_IDX, 0,
-                                     &phys, &prot, NULL);
+                                     &phys, &prot);
     if (excp >= 0) {
         if (excp == EXCP_DTLB_MISS) {
             excp = EXCP_NA_DTLB_MISS;
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c
index 66cad78a57..7f79196fff 100644
--- a/target/hppa/op_helper.c
+++ b/target/hppa/op_helper.c
@@ -334,8 +334,7 @@ target_ulong HELPER(probe)(CPUHPPAState *env, target_ulong addr,
     }
 
     mmu_idx = PRIV_P_TO_MMU_IDX(level, env->psw & PSW_P);
-    excp = hppa_get_physical_address(env, addr, mmu_idx, 0, &phys,
-                                     &prot, NULL);
+    excp = hppa_get_physical_address(env, addr, mmu_idx, 0, &phys, &prot);
     if (excp >= 0) {
         cpu_restore_state(env_cpu(env), GETPC());
         hppa_set_ior_and_isr(env, addr, MMU_IDX_MMU_DISABLED(mmu_idx));
-- 
2.34.1



  parent reply	other threads:[~2024-05-15  9:44 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-15  9:40 [PULL 00/43] target/hppa: Misc improvements Richard Henderson
2024-05-15  9:40 ` [PULL 01/43] target/hppa: Move cpu_get_tb_cpu_state out of line Richard Henderson
2024-05-15  9:40 ` [PULL 02/43] target/hppa: Use hppa_form_gva_psw in hppa_cpu_get_pc Richard Henderson
2024-05-15  9:40 ` [PULL 03/43] target/hppa: Move constant destination check into use_goto_tb Richard Henderson
2024-05-15  9:40 ` [PULL 04/43] target/hppa: Pass displacement to do_dbranch Richard Henderson
2024-05-15  9:40 ` [PULL 05/43] target/hppa: Allow prior nullification in do_ibranch Richard Henderson
2024-05-15  9:40 ` [PULL 06/43] target/hppa: Use CF_BP_PAGE instead of cpu_breakpoint_test Richard Henderson
2024-05-15  9:40 ` [PULL 07/43] target/hppa: Add install_iaq_entries Richard Henderson
2024-05-15  9:40 ` [PULL 08/43] target/hppa: Add install_link Richard Henderson
2024-05-15  9:40 ` [PULL 09/43] target/hppa: Delay computation of IAQ_Next Richard Henderson
2024-05-15  9:40 ` [PULL 10/43] target/hppa: Skip nullified insns in unconditional dbranch path Richard Henderson
2024-05-15  9:40 ` [PULL 11/43] target/hppa: Simplify TB end Richard Henderson
2024-05-15  9:40 ` [PULL 12/43] target/hppa: Add IASQ entries to DisasContext Richard Henderson
2024-05-15  9:40 ` [PULL 13/43] target/hppa: Add space arguments to install_iaq_entries Richard Henderson
2024-05-15  9:40 ` [PULL 14/43] target/hppa: Add space argument to do_ibranch Richard Henderson
2024-05-15  9:40 ` [PULL 15/43] target/hppa: Use umax in do_ibranch_priv Richard Henderson
2024-05-15  9:40 ` [PULL 16/43] target/hppa: Always make a copy " Richard Henderson
2024-05-15  9:40 ` [PULL 17/43] target/hppa: Introduce and use DisasIAQE for branch management Richard Henderson
2024-05-15  9:40 ` [PULL 18/43] target/hppa: Use displacements in DisasIAQE Richard Henderson
2024-05-15  9:40 ` [PULL 19/43] target/hppa: Rename cond_make_* helpers Richard Henderson
2024-05-15  9:40 ` [PULL 20/43] target/hppa: Use TCG_COND_TST* in do_cond Richard Henderson
2024-05-15  9:40 ` [PULL 21/43] target/hppa: Use TCG_COND_TST* in do_log_cond Richard Henderson
2024-05-15  9:40 ` [PULL 22/43] target/hppa: Use TCG_COND_TST* in do_unit_zero_cond Richard Henderson
2024-05-15  9:40 ` [PULL 23/43] target/hppa: Use TCG_COND_TST* in do_unit_addsub Richard Henderson
2024-05-15  9:40 ` [PULL 24/43] target/hppa: Use TCG_COND_TST* in trans_bb_imm Richard Henderson
2024-05-15  9:40 ` [PULL 25/43] target/hppa: Use registerfields.h for FPSR Richard Henderson
2024-05-15  9:40 ` [PULL 26/43] target/hppa: Use TCG_COND_TST* in trans_ftest Richard Henderson
2024-05-15  9:40 ` [PULL 27/43] target/hppa: Remove cond_free Richard Henderson
2024-05-15  9:40 ` [PULL 28/43] target/hppa: Introduce DisasDelayException Richard Henderson
2024-05-15  9:40 ` [PULL 29/43] target/hppa: Use delay_excp for conditional traps Richard Henderson
2024-05-15  9:40 ` [PULL 30/43] target/hppa: Use delay_excp for conditional trap on overflow Richard Henderson
2024-05-15  9:40 ` [PULL 31/43] linux-user/hppa: Force all code addresses to PRIV_USER Richard Henderson
2024-05-15  9:40 ` [PULL 32/43] target/hppa: Store full iaoq_f and page offset of iaoq_b in TB Richard Henderson
2024-05-15  9:40 ` [PULL 33/43] target/hppa: Do not mask in copy_iaoq_entry Richard Henderson
2024-05-15  9:40 ` [PULL 34/43] target/hppa: Improve hppa_cpu_dump_state Richard Henderson
2024-05-15  9:40 ` [PULL 35/43] target/hppa: Split PSW X and B into their own field Richard Henderson
2024-05-15  9:40 ` [PULL 36/43] target/hppa: Manage PSW_X and PSW_B in translator Richard Henderson
2024-05-15  9:40 ` [PULL 37/43] target/hppa: Implement PSW_B Richard Henderson
2024-05-15  9:40 ` [PULL 38/43] target/hppa: Implement PSW_X Richard Henderson
2024-05-15  9:40 ` Richard Henderson [this message]
2024-05-15  9:40 ` [PULL 40/43] target/hppa: Adjust priv for B,GATE at runtime Richard Henderson
2024-05-15  9:40 ` [PULL 41/43] target/hppa: Implement CF_PCREL Richard Henderson
2024-05-15  9:40 ` [PULL 42/43] target/hppa: Log cpu state at interrupt Richard Henderson
2024-05-15  9:40 ` [PULL 43/43] target/hppa: Log cpu state on return-from-interrupt Richard Henderson
2024-05-15 12:59 ` [PULL 00/43] target/hppa: Misc improvements Richard Henderson

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