From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-ppc@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
qemu-devel@nongnu.org,
Daniel Henrique Barboza <danielhb413@gmail.com>,
Glenn Miles <milesg@linux.vnet.ibm.com>,
Richard Henderson <richard.henderson@linaro.org>,
Chinmay Rath <rathc@linux.ibm.com>
Subject: [PATCH v2 01/12] target/ppc: Make checkstop actually stop the system
Date: Tue, 21 May 2024 11:30:17 +1000 [thread overview]
Message-ID: <20240521013029.30082-2-npiggin@gmail.com> (raw)
In-Reply-To: <20240521013029.30082-1-npiggin@gmail.com>
checkstop state does not halt the system, interrupts continue to be
serviced, and other CPUs run. Make it stop the machine with
qemu_system_guest_panicked.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/excp_helper.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 3be086d10b..b2b51537b7 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -19,6 +19,8 @@
#include "qemu/osdep.h"
#include "qemu/main-loop.h"
#include "qemu/log.h"
+#include "sysemu/sysemu.h"
+#include "sysemu/runstate.h"
#include "cpu.h"
#include "exec/exec-all.h"
#include "internal.h"
@@ -425,6 +427,8 @@ static void powerpc_set_excp_state(PowerPCCPU *cpu, target_ulong vector,
static void powerpc_mcheck_checkstop(CPUPPCState *env)
{
+ /* KVM guests always have MSR[ME] enabled */
+#ifdef CONFIG_TCG
CPUState *cs = env_cpu(env);
if (FIELD_EX64(env->msr, MSR, ME)) {
@@ -437,9 +441,15 @@ static void powerpc_mcheck_checkstop(CPUPPCState *env)
if (qemu_log_separate()) {
qemu_log("Machine check while not allowed. "
"Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
+
+ /*
+ * This stops the machine and logs CPU state without killing QEMU
+ * (like cpu_abort()) so the machine can still be debugged (because
+ * it is often a guest error).
+ */
+ qemu_system_guest_panicked(NULL);
+ cpu_loop_exit_noexc(cs);
+#endif
}
static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
--
2.43.0
next prev parent reply other threads:[~2024-05-21 1:31 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-21 1:30 [PATCH v2 00/12] target/ppc: Various TCG emulation patches Nicholas Piggin
2024-05-21 1:30 ` Nicholas Piggin [this message]
2024-05-21 15:32 ` [PATCH v2 01/12] target/ppc: Make checkstop actually stop the system Miles Glenn
2024-05-21 1:30 ` [PATCH v2 02/12] target/ppc: improve checkstop logging Nicholas Piggin
2024-05-21 15:37 ` Miles Glenn
2024-05-21 17:29 ` Richard Henderson
2025-04-29 6:49 ` Philippe Mathieu-Daudé
2024-05-21 1:30 ` [PATCH v2 03/12] target/ppc: Implement attn instruction on BookS 64-bit processors Nicholas Piggin
2024-05-21 15:41 ` Miles Glenn
2024-05-22 1:30 ` Nicholas Piggin
2024-05-21 17:34 ` Richard Henderson
2024-05-22 1:32 ` Nicholas Piggin
2024-05-21 1:30 ` [PATCH v2 04/12] target/ppc: BookE DECAR SPR is 32-bit Nicholas Piggin
2024-05-21 15:44 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 05/12] target/ppc: Wire up BookE ATB registers for e500 family Nicholas Piggin
2024-05-21 1:30 ` [PATCH v2 06/12] target/ppc: Add PPR32 SPR Nicholas Piggin
2024-05-21 15:52 ` Miles Glenn
2024-05-21 17:40 ` Richard Henderson
2024-05-22 1:43 ` Nicholas Piggin
2024-05-21 1:30 ` [PATCH v2 07/12] target/ppc: add helper to write per-LPAR SPRs Nicholas Piggin
2024-05-21 16:50 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 08/12] target/ppc: Add SMT support to simple SPRs Nicholas Piggin
2024-05-21 15:56 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 09/12] target/ppc: Add SMT support to PTCR SPR Nicholas Piggin
2024-05-21 16:02 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 10/12] target/ppc: Implement LDBAR, TTR SPRs Nicholas Piggin
2024-05-21 16:41 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 11/12] target/ppc: Implement SPRC/SPRD SPRs Nicholas Piggin
2024-05-21 16:37 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 12/12] target/ppc: add SMT support to msgsnd broadcast Nicholas Piggin
2024-05-21 17:07 ` Miles Glenn
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