From: Zhenzhong Duan <zhenzhong.duan@intel.com>
To: qemu-devel@nongnu.org
Cc: alex.williamson@redhat.com, clg@redhat.com,
eric.auger@redhat.com, chao.p.peng@intel.com,
Zhenzhong Duan <zhenzhong.duan@intel.com>
Subject: [PATCH v2 16/20] vfio/pci-quirks: Make vfio_add_*_cap() return bool
Date: Wed, 22 May 2024 12:40:11 +0800 [thread overview]
Message-ID: <20240522044015.412951-17-zhenzhong.duan@intel.com> (raw)
In-Reply-To: <20240522044015.412951-1-zhenzhong.duan@intel.com>
This is to follow the coding standand in qapi/error.h to return bool
for bool-valued functions.
Include below functions:
vfio_add_virt_caps()
vfio_add_nv_gpudirect_cap()
vfio_add_vmd_shadow_cap()
Suggested-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
hw/vfio/pci.h | 2 +-
hw/vfio/pci-quirks.c | 42 +++++++++++++++++++-----------------------
hw/vfio/pci.c | 3 +--
3 files changed, 21 insertions(+), 26 deletions(-)
diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h
index f158681072..bf67df2fbc 100644
--- a/hw/vfio/pci.h
+++ b/hw/vfio/pci.h
@@ -212,7 +212,7 @@ void vfio_bar_quirk_setup(VFIOPCIDevice *vdev, int nr);
void vfio_bar_quirk_exit(VFIOPCIDevice *vdev, int nr);
void vfio_bar_quirk_finalize(VFIOPCIDevice *vdev, int nr);
void vfio_setup_resetfn_quirk(VFIOPCIDevice *vdev);
-int vfio_add_virt_caps(VFIOPCIDevice *vdev, Error **errp);
+bool vfio_add_virt_caps(VFIOPCIDevice *vdev, Error **errp);
void vfio_quirk_reset(VFIOPCIDevice *vdev);
VFIOQuirk *vfio_quirk_alloc(int nr_mem);
void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr);
diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c
index ca27917159..39dae72497 100644
--- a/hw/vfio/pci-quirks.c
+++ b/hw/vfio/pci-quirks.c
@@ -1536,7 +1536,7 @@ static bool is_valid_std_cap_offset(uint8_t pos)
pos <= (PCI_CFG_SPACE_SIZE - PCI_CAP_SIZEOF));
}
-static int vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
+static bool vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
{
ERRP_GUARD();
PCIDevice *pdev = &vdev->pdev;
@@ -1545,18 +1545,18 @@ static int vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
uint8_t tmp;
if (vdev->nv_gpudirect_clique == 0xFF) {
- return 0;
+ return true;
}
if (!vfio_pci_is(vdev, PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID)) {
error_setg(errp, "NVIDIA GPUDirect Clique ID: invalid device vendor");
- return -EINVAL;
+ return false;
}
if (pci_get_byte(pdev->config + PCI_CLASS_DEVICE + 1) !=
PCI_BASE_CLASS_DISPLAY) {
error_setg(errp, "NVIDIA GPUDirect Clique ID: unsupported PCI class");
- return -EINVAL;
+ return false;
}
/*
@@ -1572,7 +1572,7 @@ static int vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
vdev->config_offset + PCI_CAPABILITY_LIST);
if (ret != 1 || !is_valid_std_cap_offset(tmp)) {
error_setg(errp, "NVIDIA GPUDirect Clique ID: error getting cap list");
- return -EINVAL;
+ return false;
}
do {
@@ -1590,13 +1590,13 @@ static int vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
pos = 0xD4;
} else {
error_setg(errp, "NVIDIA GPUDirect Clique ID: invalid config space");
- return -EINVAL;
+ return false;
}
ret = pci_add_capability(pdev, PCI_CAP_ID_VNDR, pos, 8, errp);
if (ret < 0) {
error_prepend(errp, "Failed to add NVIDIA GPUDirect cap: ");
- return ret;
+ return false;
}
memset(vdev->emulated_config_bits + pos, 0xFF, 8);
@@ -1608,7 +1608,7 @@ static int vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
pci_set_byte(pdev->config + pos++, vdev->nv_gpudirect_clique << 3);
pci_set_byte(pdev->config + pos, 0);
- return 0;
+ return true;
}
/*
@@ -1629,7 +1629,7 @@ static int vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
*/
#define VMD_SHADOW_CAP_VER 1
#define VMD_SHADOW_CAP_LEN 24
-static int vfio_add_vmd_shadow_cap(VFIOPCIDevice *vdev, Error **errp)
+static bool vfio_add_vmd_shadow_cap(VFIOPCIDevice *vdev, Error **errp)
{
ERRP_GUARD();
uint8_t membar_phys[16];
@@ -1639,7 +1639,7 @@ static int vfio_add_vmd_shadow_cap(VFIOPCIDevice *vdev, Error **errp)
vfio_pci_is(vdev, PCI_VENDOR_ID_INTEL, 0x467F) ||
vfio_pci_is(vdev, PCI_VENDOR_ID_INTEL, 0x4C3D) ||
vfio_pci_is(vdev, PCI_VENDOR_ID_INTEL, 0x9A0B))) {
- return 0;
+ return true;
}
ret = pread(vdev->vbasedev.fd, membar_phys, 16,
@@ -1647,14 +1647,14 @@ static int vfio_add_vmd_shadow_cap(VFIOPCIDevice *vdev, Error **errp)
if (ret != 16) {
error_report("VMD %s cannot read MEMBARs (%d)",
vdev->vbasedev.name, ret);
- return -EFAULT;
+ return false;
}
ret = pci_add_capability(&vdev->pdev, PCI_CAP_ID_VNDR, pos,
VMD_SHADOW_CAP_LEN, errp);
if (ret < 0) {
error_prepend(errp, "Failed to add VMD MEMBAR Shadow cap: ");
- return ret;
+ return false;
}
memset(vdev->emulated_config_bits + pos, 0xFF, VMD_SHADOW_CAP_LEN);
@@ -1664,22 +1664,18 @@ static int vfio_add_vmd_shadow_cap(VFIOPCIDevice *vdev, Error **errp)
pci_set_long(vdev->pdev.config + pos, 0x53484457); /* SHDW */
memcpy(vdev->pdev.config + pos + 4, membar_phys, 16);
- return 0;
+ return true;
}
-int vfio_add_virt_caps(VFIOPCIDevice *vdev, Error **errp)
+bool vfio_add_virt_caps(VFIOPCIDevice *vdev, Error **errp)
{
- int ret;
-
- ret = vfio_add_nv_gpudirect_cap(vdev, errp);
- if (ret) {
- return ret;
+ if (!vfio_add_nv_gpudirect_cap(vdev, errp)) {
+ return false;
}
- ret = vfio_add_vmd_shadow_cap(vdev, errp);
- if (ret) {
- return ret;
+ if (!vfio_add_vmd_shadow_cap(vdev, errp)) {
+ return false;
}
- return 0;
+ return true;
}
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 76a3931dba..35ad9b582f 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -2194,8 +2194,7 @@ static bool vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos, Error **errp)
vdev->emulated_config_bits[PCI_CAPABILITY_LIST] = 0xff;
vdev->emulated_config_bits[PCI_STATUS] |= PCI_STATUS_CAP_LIST;
- ret = vfio_add_virt_caps(vdev, errp);
- if (ret) {
+ if (!vfio_add_virt_caps(vdev, errp)) {
return false;
}
}
--
2.34.1
next prev parent reply other threads:[~2024-05-22 4:43 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-22 4:39 [PATCH v2 00/20] VFIO: misc cleanups part2 Zhenzhong Duan
2024-05-22 4:39 ` [PATCH v2 01/20] vfio/display: Fix error path in call site of ramfb_setup() Zhenzhong Duan
2024-05-22 4:39 ` [PATCH v2 02/20] vfio/display: Make vfio_display_*() return bool Zhenzhong Duan
2024-05-22 4:39 ` [PATCH v2 03/20] vfio/helpers: Use g_autofree in vfio_set_irq_signaling() Zhenzhong Duan
2024-05-22 5:59 ` Cédric Le Goater
2024-05-22 4:39 ` [PATCH v2 04/20] vfio/helpers: Make vfio_set_irq_signaling() return bool Zhenzhong Duan
2024-05-22 4:40 ` [PATCH v2 05/20] vfio/helpers: Make vfio_device_get_name() " Zhenzhong Duan
2024-05-22 4:40 ` [PATCH v2 06/20] vfio/platform: Make vfio_populate_device() and vfio_base_device_init() " Zhenzhong Duan
2024-05-22 4:40 ` [PATCH v2 07/20] vfio/ccw: Make vfio_ccw_get_region() return a bool Zhenzhong Duan
2024-05-22 4:40 ` [PATCH v2 08/20] vfio/pci: Make vfio_intx_enable_kvm() " Zhenzhong Duan
2024-05-22 4:40 ` [PATCH v2 09/20] vfio/pci: Make vfio_pci_relocate_msix() and vfio_msix_early_setup() " Zhenzhong Duan
2024-05-22 6:06 ` Cédric Le Goater
2024-05-22 4:40 ` [PATCH v2 10/20] vfio/pci: Make vfio_populate_device() " Zhenzhong Duan
2024-05-22 6:06 ` Cédric Le Goater
2024-05-22 4:40 ` [PATCH v2 11/20] vfio/pci: Make vfio_intx_enable() return bool Zhenzhong Duan
2024-05-22 4:40 ` [PATCH v2 12/20] vfio/pci: Make vfio_populate_vga() " Zhenzhong Duan
2024-05-22 4:40 ` [PATCH v2 13/20] vfio/pci: Make capability related functions " Zhenzhong Duan
2024-05-22 4:40 ` [PATCH v2 14/20] vfio/pci: Use g_autofree for vfio_region_info pointer Zhenzhong Duan
2024-05-22 4:40 ` [PATCH v2 15/20] vfio/pci-quirks: Make vfio_pci_igd_opregion_init() return bool Zhenzhong Duan
2024-05-22 4:40 ` Zhenzhong Duan [this message]
2024-05-22 4:40 ` [PATCH v2 17/20] vfio: Use g_autofree in all call site of vfio_get_region_info() Zhenzhong Duan
2024-05-22 7:20 ` Cédric Le Goater
2024-05-22 4:40 ` [PATCH v2 18/20] vfio/igd: Use g_autofree in vfio_probe_igd_bar4_quirk() Zhenzhong Duan
2024-05-22 7:14 ` Cédric Le Goater
2024-05-22 4:40 ` [PATCH v2 19/20] vfio/ccw: Drop local @err in vfio_ccw_realize() Zhenzhong Duan
2024-05-22 7:50 ` Cédric Le Goater
2024-05-22 8:01 ` Duan, Zhenzhong
2024-05-22 4:40 ` [PATCH v2 20/20] vfio/ccw: Fix the missed unrealize() call in error path Zhenzhong Duan
2024-05-22 7:51 ` Cédric Le Goater
2024-05-22 8:05 ` Duan, Zhenzhong
2024-05-22 8:20 ` Cédric Le Goater
2024-05-22 9:32 ` [PATCH v2 00/20] VFIO: misc cleanups part2 Cédric Le Goater
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240522044015.412951-17-zhenzhong.duan@intel.com \
--to=zhenzhong.duan@intel.com \
--cc=alex.williamson@redhat.com \
--cc=chao.p.peng@intel.com \
--cc=clg@redhat.com \
--cc=eric.auger@redhat.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).