From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Cc: npiggin@gmail.com, balaton@eik.bme.hu, danielhb413@gmail.com
Subject: [PATCH v2 6/7] target/ppc: reduce duplicate code between init_proc_POWER{9, 10}
Date: Thu, 23 May 2024 10:44:11 +0530 [thread overview]
Message-ID: <20240523051412.226970-7-harshpb@linux.ibm.com> (raw)
In-Reply-To: <20240523051412.226970-1-harshpb@linux.ibm.com>
Historically, the registration of sprs have been inherited alongwith
every new Power arch support being added leading to a lot of code
duplication. It's time to do necessary cleanups now to avoid further
duplication with newer arch support being added.
Signed-off-by: Harsh Prateek Bora <harshb@linux.ibm.com>
---
target/ppc/cpu_init.c | 43 +++++++++----------------------------------
1 file changed, 9 insertions(+), 34 deletions(-)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 6d82f24c87..5fb9a0583e 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -6307,7 +6307,7 @@ static struct ppc_radix_page_info POWER9_radix_page_info = {
};
#endif /* CONFIG_USER_ONLY */
-static void init_proc_POWER9(CPUPPCState *env)
+static void register_power9_common_sprs(CPUPPCState *env)
{
/* Common Registers */
init_proc_book3s_common(env);
@@ -6326,7 +6326,6 @@ static void init_proc_POWER9(CPUPPCState *env)
register_power5p_ear_sprs(env);
register_power5p_tb_sprs(env);
register_power6_common_sprs(env);
- register_HEIR32_spr(env);
register_power6_dbg_sprs(env);
register_power8_tce_address_control_sprs(env);
register_power8_ids_sprs(env);
@@ -6342,6 +6341,12 @@ static void init_proc_POWER9(CPUPPCState *env)
register_power9_book4_sprs(env);
register_power8_rpr_sprs(env);
register_power9_mmu_sprs(env);
+}
+
+static void init_proc_POWER9(CPUPPCState *env)
+{
+ register_power9_common_sprs(env);
+ register_HEIR32_spr(env);
/* POWER9 Specific registers */
spr_register_kvm(env, SPR_TIDR, "TIDR", NULL, NULL,
@@ -6499,39 +6504,9 @@ static struct ppc_radix_page_info POWER10_radix_page_info = {
static void init_proc_POWER10(CPUPPCState *env)
{
- /* Common Registers */
- init_proc_book3s_common(env);
- register_book3s_207_dbg_sprs(env);
-
- /* Common TCG PMU */
- init_tcg_pmu_power8(env);
-
- /* POWER8 Specific Registers */
- register_book3s_ids_sprs(env);
- register_amr_sprs(env);
- register_iamr_sprs(env);
- register_book3s_purr_sprs(env);
- register_power5p_common_sprs(env);
- register_power5p_lpar_sprs(env);
- register_power5p_ear_sprs(env);
- register_power5p_tb_sprs(env);
- register_power6_common_sprs(env);
+ register_power9_common_sprs(env);
register_HEIR64_spr(env);
- register_power6_dbg_sprs(env);
- register_power8_tce_address_control_sprs(env);
- register_power8_ids_sprs(env);
- register_power8_ebb_sprs(env);
- register_power8_fscr_sprs(env);
- register_power8_pmu_sup_sprs(env);
- register_power8_pmu_user_sprs(env);
- register_power8_tm_sprs(env);
- register_power8_pspb_sprs(env);
- register_power8_dpdes_sprs(env);
- register_vtb_sprs(env);
- register_power8_ic_sprs(env);
- register_power9_book4_sprs(env);
- register_power8_rpr_sprs(env);
- register_power9_mmu_sprs(env);
+
register_power10_hash_sprs(env);
register_power10_dexcr_sprs(env);
register_power10_pmu_sup_sprs(env);
--
2.39.3
next prev parent reply other threads:[~2024-05-23 5:17 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-23 5:14 [PATCH v2 0/7] target/ppc: misc ppc improvements/optimizations Harsh Prateek Bora
2024-05-23 5:14 ` [PATCH v2 1/7] target/ppc: use locally stored msr and avoid indirect access Harsh Prateek Bora
2024-07-04 7:36 ` Nicholas Piggin
2024-07-04 7:42 ` Nicholas Piggin
2024-05-23 5:14 ` [PATCH v2 2/7] target/ppc: optimize hreg_compute_pmu_hflags_value Harsh Prateek Bora
2024-07-04 7:37 ` Nicholas Piggin
2024-05-23 5:14 ` [PATCH v2 3/7] " Harsh Prateek Bora
2024-07-04 7:38 ` Nicholas Piggin
2024-05-23 5:14 ` [PATCH v2 4/7] target/ppc: optimize p9 exception handling routines Harsh Prateek Bora
2024-07-04 7:40 ` Nicholas Piggin
2024-05-23 5:14 ` [PATCH v2 5/7] target/ppc: optimize p9 exception handling routines for lpcr Harsh Prateek Bora
2024-07-04 7:43 ` Nicholas Piggin
2024-09-13 4:18 ` Harsh Prateek Bora
2024-05-23 5:14 ` Harsh Prateek Bora [this message]
2024-05-23 5:14 ` [PATCH v2 7/7] target/ppc: redue code duplication across Power9/10 init code Harsh Prateek Bora
2024-07-04 7:49 ` Nicholas Piggin
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