From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v2 10/37] target/sparc: Add feature bits for VIS 3
Date: Sun, 26 May 2024 12:42:27 -0700 [thread overview]
Message-ID: <20240526194254.459395-11-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240526194254.459395-1-richard.henderson@linaro.org>
The manual separates VIS 3 and VIS 3B, even though they are both
present in all extant cpus. For clarity, let the translator
match the manual but otherwise leave them on the same feature bit.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/cpu-feature.h.inc | 1 +
target/sparc/translate.c | 4 ++++
2 files changed, 5 insertions(+)
diff --git a/target/sparc/cpu-feature.h.inc b/target/sparc/cpu-feature.h.inc
index a30b9255b2..3913fb4a54 100644
--- a/target/sparc/cpu-feature.h.inc
+++ b/target/sparc/cpu-feature.h.inc
@@ -13,3 +13,4 @@ FEATURE(CACHE_CTRL)
FEATURE(POWERDOWN)
FEATURE(CASA)
FEATURE(FMAF)
+FEATURE(VIS3)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 378da991eb..9e5fe905ad 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -2188,6 +2188,8 @@ static int extract_qfpreg(DisasContext *dc, int x)
# define avail_HYPV(C) ((C)->def->features & CPU_FEATURE_HYPV)
# define avail_VIS1(C) ((C)->def->features & CPU_FEATURE_VIS1)
# define avail_VIS2(C) ((C)->def->features & CPU_FEATURE_VIS2)
+# define avail_VIS3(C) ((C)->def->features & CPU_FEATURE_VIS3)
+# define avail_VIS3B(C) avail_VIS3(C)
#else
# define avail_32(C) true
# define avail_ASR17(C) ((C)->def->features & CPU_FEATURE_ASR17)
@@ -2201,6 +2203,8 @@ static int extract_qfpreg(DisasContext *dc, int x)
# define avail_HYPV(C) false
# define avail_VIS1(C) false
# define avail_VIS2(C) false
+# define avail_VIS3(C) false
+# define avail_VIS3B(C) false
#endif
/* Default case for non jump instructions. */
--
2.34.1
next prev parent reply other threads:[~2024-05-26 19:47 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-26 19:42 [PATCH v2 00/37] target/sparc: Implement VIS4 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 01/37] target/sparc: Fix ARRAY8 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 02/37] target/sparc: Rewrite gen_edge Richard Henderson
2024-05-26 19:42 ` [PATCH v2 03/37] target/sparc: Fix do_dc Richard Henderson
2024-06-04 11:41 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 04/37] target/sparc: Fix helper_fmul8ulx16 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 05/37] target/sparc: Perform DFPREG/QFPREG in decodetree Richard Henderson
2024-05-26 19:42 ` [PATCH v2 06/37] target/sparc: Remove gen_dest_fpr_D Richard Henderson
2024-05-26 19:42 ` [PATCH v2 07/37] target/sparc: Remove cpu_fpr[] Richard Henderson
2024-05-26 19:42 ` [PATCH v2 08/37] target/sparc: Use gvec for VIS1 parallel add/sub Richard Henderson
2024-06-04 13:18 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 09/37] target/sparc: Implement FMAf extension Richard Henderson
2024-05-26 19:42 ` Richard Henderson [this message]
2024-05-26 19:42 ` [PATCH v2 11/37] target/sparc: Implement ADDXC, ADDXCcc Richard Henderson
2024-05-26 19:42 ` [PATCH v2 12/37] target/sparc: Implement CMASK instructions Richard Henderson
2024-06-04 13:30 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 13/37] target/sparc: Implement FCHKSM16 Richard Henderson
2024-06-05 8:07 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 14/37] target/sparc: Implement FHADD, FHSUB, FNHADD, FNADD, FNMUL Richard Henderson
2024-05-26 19:42 ` [PATCH v2 15/37] target/sparc: Implement FLCMP Richard Henderson
2024-05-26 19:42 ` [PATCH v2 16/37] target/sparc: Implement FMEAN16 Richard Henderson
2024-06-04 13:33 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 17/37] target/sparc: Implement FPADD64, FPSUB64 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 18/37] target/sparc: Implement FPADDS, FPSUBS Richard Henderson
2024-06-05 8:04 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 19/37] target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8 Richard Henderson
2024-06-05 7:57 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 20/37] target/sparc: Implement FSLL, FSRL, FSRA, FSLAS Richard Henderson
2024-06-04 13:38 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 21/37] target/sparc: Implement LDXEFSR Richard Henderson
2024-06-05 7:55 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 22/37] target/sparc: Implement LZCNT Richard Henderson
2024-05-26 19:42 ` [PATCH v2 23/37] target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd Richard Henderson
2024-06-05 7:49 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 24/37] target/sparc: Implement PDISTN Richard Henderson
2024-05-26 19:42 ` [PATCH v2 25/37] target/sparc: Implement UMULXHI Richard Henderson
2024-06-04 13:40 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 26/37] target/sparc: Implement XMULX Richard Henderson
2024-06-04 13:41 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 27/37] target/sparc: Enable VIS3 feature bit Richard Henderson
2024-06-04 13:42 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 28/37] target/sparc: Implement IMA extension Richard Henderson
2024-05-26 19:42 ` [PATCH v2 29/37] target/sparc: Add feature bit for VIS4 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 30/37] target/sparc: Implement FALIGNDATAi Richard Henderson
2024-06-05 7:35 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 31/37] target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS Richard Henderson
2024-05-26 19:42 ` [PATCH v2 32/37] target/sparc: Implement VIS4 comparisons Richard Henderson
2024-06-05 7:10 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 33/37] target/sparc: Implement FPMIN, FPMAX Richard Henderson
2024-05-26 19:42 ` [PATCH v2 34/37] target/sparc: Implement SUBXC, SUBXCcc Richard Henderson
2024-05-26 19:42 ` [PATCH v2 35/37] target/sparc: Implement MWAIT Richard Henderson
2024-06-05 7:27 ` Philippe Mathieu-Daudé
2024-06-05 16:11 ` Richard Henderson
2024-05-26 19:42 ` [PATCH v2 36/37] target/sparc: Implement monitor ASIs Richard Henderson
2024-05-26 19:42 ` [PATCH v2 37/37] target/sparc: Enable VIS4 feature bit Richard Henderson
2024-05-28 21:29 ` [PATCH v2 00/37] target/sparc: Implement VIS4 Mark Cave-Ayland
2024-06-04 6:25 ` Mark Cave-Ayland
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240526194254.459395-11-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=mark.cave-ayland@ilande.co.uk \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).