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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk
Subject: [PATCH v2 01/37] target/sparc: Fix ARRAY8
Date: Sun, 26 May 2024 12:42:18 -0700	[thread overview]
Message-ID: <20240526194254.459395-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240526194254.459395-1-richard.henderson@linaro.org>

Follow the Oracle Sparc 2015 implementation note and bound
the input value of N to 5 from the lower 3 bits of rs2.
Spell out all of the intermediate values, matching the diagram
in the manual.  Fix extraction of upper_x and upper_y for N=0.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/sparc/vis_helper.c | 53 ++++++++++++++++++++++++++-------------
 1 file changed, 35 insertions(+), 18 deletions(-)

diff --git a/target/sparc/vis_helper.c b/target/sparc/vis_helper.c
index e15c6bb34e..f46fcf1f6a 100644
--- a/target/sparc/vis_helper.c
+++ b/target/sparc/vis_helper.c
@@ -21,25 +21,42 @@
 #include "cpu.h"
 #include "exec/helper-proto.h"
 
-/* This function uses non-native bit order */
-#define GET_FIELD(X, FROM, TO)                                  \
-    ((X) >> (63 - (TO)) & ((1ULL << ((TO) - (FROM) + 1)) - 1))
-
-/* This function uses the order in the manuals, i.e. bit 0 is 2^0 */
-#define GET_FIELD_SP(X, FROM, TO)               \
-    GET_FIELD(X, 63 - (TO), 63 - (FROM))
-
-target_ulong helper_array8(target_ulong pixel_addr, target_ulong cubesize)
+target_ulong helper_array8(target_ulong rs1, target_ulong rs2)
 {
-    return (GET_FIELD_SP(pixel_addr, 60, 63) << (17 + 2 * cubesize)) |
-        (GET_FIELD_SP(pixel_addr, 39, 39 + cubesize - 1) << (17 + cubesize)) |
-        (GET_FIELD_SP(pixel_addr, 17 + cubesize - 1, 17) << 17) |
-        (GET_FIELD_SP(pixel_addr, 56, 59) << 13) |
-        (GET_FIELD_SP(pixel_addr, 35, 38) << 9) |
-        (GET_FIELD_SP(pixel_addr, 13, 16) << 5) |
-        (((pixel_addr >> 55) & 1) << 4) |
-        (GET_FIELD_SP(pixel_addr, 33, 34) << 2) |
-        GET_FIELD_SP(pixel_addr, 11, 12);
+    /*
+     * From Oracle SPARC Architecture 2015:
+     * Architecturally, an illegal R[rs2] value (>5) causes the array
+     * instructions to produce undefined results. For historic reference,
+     * past implementations of these instructions have ignored R[rs2]{63:3}
+     * and have treated R[rs2] values of 6 and 7 as if they were 5.
+     */
+    target_ulong n = MIN(rs2 & 7, 5);
+
+    target_ulong x_int = (rs1 >> 11) & 0x7ff;
+    target_ulong y_int = (rs1 >> 33) & 0x7ff;
+    target_ulong z_int = rs1 >> 55;
+
+    target_ulong lower_x = x_int & 3;
+    target_ulong lower_y = y_int & 3;
+    target_ulong lower_z = z_int & 1;
+
+    target_ulong middle_x = (x_int >> 2) & 15;
+    target_ulong middle_y = (y_int >> 2) & 15;
+    target_ulong middle_z = (z_int >> 1) & 15;
+
+    target_ulong upper_x = (x_int >> 6) & ((1 << n) - 1);
+    target_ulong upper_y = (y_int >> 6) & ((1 << n) - 1);
+    target_ulong upper_z = z_int >> 5;
+
+    return (upper_z << (17 + 2 * n))
+         | (upper_y << (17 + n))
+         | (upper_x << 17)
+         | (middle_z << 13)
+         | (middle_y << 9)
+         | (middle_x << 5)
+         | (lower_z << 4)
+         | (lower_y << 2)
+         | lower_x;
 }
 
 #if HOST_BIG_ENDIAN
-- 
2.34.1



  reply	other threads:[~2024-05-26 19:43 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-26 19:42 [PATCH v2 00/37] target/sparc: Implement VIS4 Richard Henderson
2024-05-26 19:42 ` Richard Henderson [this message]
2024-05-26 19:42 ` [PATCH v2 02/37] target/sparc: Rewrite gen_edge Richard Henderson
2024-05-26 19:42 ` [PATCH v2 03/37] target/sparc: Fix do_dc Richard Henderson
2024-06-04 11:41   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 04/37] target/sparc: Fix helper_fmul8ulx16 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 05/37] target/sparc: Perform DFPREG/QFPREG in decodetree Richard Henderson
2024-05-26 19:42 ` [PATCH v2 06/37] target/sparc: Remove gen_dest_fpr_D Richard Henderson
2024-05-26 19:42 ` [PATCH v2 07/37] target/sparc: Remove cpu_fpr[] Richard Henderson
2024-05-26 19:42 ` [PATCH v2 08/37] target/sparc: Use gvec for VIS1 parallel add/sub Richard Henderson
2024-06-04 13:18   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 09/37] target/sparc: Implement FMAf extension Richard Henderson
2024-05-26 19:42 ` [PATCH v2 10/37] target/sparc: Add feature bits for VIS 3 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 11/37] target/sparc: Implement ADDXC, ADDXCcc Richard Henderson
2024-05-26 19:42 ` [PATCH v2 12/37] target/sparc: Implement CMASK instructions Richard Henderson
2024-06-04 13:30   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 13/37] target/sparc: Implement FCHKSM16 Richard Henderson
2024-06-05  8:07   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 14/37] target/sparc: Implement FHADD, FHSUB, FNHADD, FNADD, FNMUL Richard Henderson
2024-05-26 19:42 ` [PATCH v2 15/37] target/sparc: Implement FLCMP Richard Henderson
2024-05-26 19:42 ` [PATCH v2 16/37] target/sparc: Implement FMEAN16 Richard Henderson
2024-06-04 13:33   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 17/37] target/sparc: Implement FPADD64, FPSUB64 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 18/37] target/sparc: Implement FPADDS, FPSUBS Richard Henderson
2024-06-05  8:04   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 19/37] target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8 Richard Henderson
2024-06-05  7:57   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 20/37] target/sparc: Implement FSLL, FSRL, FSRA, FSLAS Richard Henderson
2024-06-04 13:38   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 21/37] target/sparc: Implement LDXEFSR Richard Henderson
2024-06-05  7:55   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 22/37] target/sparc: Implement LZCNT Richard Henderson
2024-05-26 19:42 ` [PATCH v2 23/37] target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd Richard Henderson
2024-06-05  7:49   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 24/37] target/sparc: Implement PDISTN Richard Henderson
2024-05-26 19:42 ` [PATCH v2 25/37] target/sparc: Implement UMULXHI Richard Henderson
2024-06-04 13:40   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 26/37] target/sparc: Implement XMULX Richard Henderson
2024-06-04 13:41   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 27/37] target/sparc: Enable VIS3 feature bit Richard Henderson
2024-06-04 13:42   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 28/37] target/sparc: Implement IMA extension Richard Henderson
2024-05-26 19:42 ` [PATCH v2 29/37] target/sparc: Add feature bit for VIS4 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 30/37] target/sparc: Implement FALIGNDATAi Richard Henderson
2024-06-05  7:35   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 31/37] target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS Richard Henderson
2024-05-26 19:42 ` [PATCH v2 32/37] target/sparc: Implement VIS4 comparisons Richard Henderson
2024-06-05  7:10   ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 33/37] target/sparc: Implement FPMIN, FPMAX Richard Henderson
2024-05-26 19:42 ` [PATCH v2 34/37] target/sparc: Implement SUBXC, SUBXCcc Richard Henderson
2024-05-26 19:42 ` [PATCH v2 35/37] target/sparc: Implement MWAIT Richard Henderson
2024-06-05  7:27   ` Philippe Mathieu-Daudé
2024-06-05 16:11     ` Richard Henderson
2024-05-26 19:42 ` [PATCH v2 36/37] target/sparc: Implement monitor ASIs Richard Henderson
2024-05-26 19:42 ` [PATCH v2 37/37] target/sparc: Enable VIS4 feature bit Richard Henderson
2024-05-28 21:29 ` [PATCH v2 00/37] target/sparc: Implement VIS4 Mark Cave-Ayland
2024-06-04  6:25   ` Mark Cave-Ayland

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