From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v2 06/37] target/sparc: Remove gen_dest_fpr_D
Date: Sun, 26 May 2024 12:42:23 -0700 [thread overview]
Message-ID: <20240526194254.459395-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240526194254.459395-1-richard.henderson@linaro.org>
Replace with tcg_temp_new_i64.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/translate.c | 27 +++++++++++----------------
1 file changed, 11 insertions(+), 16 deletions(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index f3c52c7c48..750a3e6554 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -241,11 +241,6 @@ static void gen_store_fpr_D(DisasContext *dc, unsigned int dst, TCGv_i64 v)
gen_update_fprs_dirty(dc, dst);
}
-static TCGv_i64 gen_dest_fpr_D(DisasContext *dc, unsigned int dst)
-{
- return cpu_fpr[dst / 2];
-}
-
static TCGv_i128 gen_load_fpr_Q(DisasContext *dc, unsigned int src)
{
TCGv_i128 ret = tcg_temp_new_i128();
@@ -2020,7 +2015,7 @@ static void gen_fmovs(DisasContext *dc, DisasCompare *cmp, int rd, int rs)
static void gen_fmovd(DisasContext *dc, DisasCompare *cmp, int rd, int rs)
{
#ifdef TARGET_SPARC64
- TCGv_i64 dst = gen_dest_fpr_D(dc, rd);
+ TCGv_i64 dst = tcg_temp_new_i64();
tcg_gen_movcond_i64(cmp->cond, dst, cmp->c1, tcg_constant_tl(cmp->c2),
gen_load_fpr_D(dc, rs),
gen_load_fpr_D(dc, rd));
@@ -4345,7 +4340,7 @@ static bool do_dd(DisasContext *dc, arg_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src = gen_load_fpr_D(dc, a->rs);
func(dst, src);
gen_store_fpr_D(dc, a->rd, dst);
@@ -4367,7 +4362,7 @@ static bool do_env_dd(DisasContext *dc, arg_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src = gen_load_fpr_D(dc, a->rs);
func(dst, tcg_env, src);
gen_store_fpr_D(dc, a->rd, dst);
@@ -4407,7 +4402,7 @@ static bool do_env_df(DisasContext *dc, arg_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src = gen_load_fpr_F(dc, a->rs);
func(dst, tcg_env, src);
gen_store_fpr_D(dc, a->rd, dst);
@@ -4498,7 +4493,7 @@ static bool do_env_dq(DisasContext *dc, arg_r_r *a,
}
src = gen_load_fpr_Q(dc, a->rs);
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
func(dst, tcg_env, src);
gen_store_fpr_D(dc, a->rd, dst);
return advance_pc(dc);
@@ -4613,7 +4608,7 @@ static bool do_dff(DisasContext *dc, arg_r_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src1 = gen_load_fpr_F(dc, a->rs1);
src2 = gen_load_fpr_F(dc, a->rs2);
func(dst, src1, src2);
@@ -4637,7 +4632,7 @@ static bool do_dfd(DisasContext *dc, arg_r_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src1 = gen_load_fpr_F(dc, a->rs1);
src2 = gen_load_fpr_D(dc, a->rs2);
func(dst, src1, src2);
@@ -4656,7 +4651,7 @@ static bool do_ddd(DisasContext *dc, arg_r_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src1 = gen_load_fpr_D(dc, a->rs1);
src2 = gen_load_fpr_D(dc, a->rs2);
func(dst, src1, src2);
@@ -4721,7 +4716,7 @@ static bool do_env_ddd(DisasContext *dc, arg_r_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src1 = gen_load_fpr_D(dc, a->rs1);
src2 = gen_load_fpr_D(dc, a->rs2);
func(dst, tcg_env, src1, src2);
@@ -4746,7 +4741,7 @@ static bool trans_FsMULd(DisasContext *dc, arg_r_r_r *a)
return raise_unimpfpop(dc);
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src1 = gen_load_fpr_F(dc, a->rs1);
src2 = gen_load_fpr_F(dc, a->rs2);
gen_helper_fsmuld(dst, tcg_env, src1, src2);
@@ -4763,7 +4758,7 @@ static bool do_dddd(DisasContext *dc, arg_r_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src0 = gen_load_fpr_D(dc, a->rd);
src1 = gen_load_fpr_D(dc, a->rs1);
src2 = gen_load_fpr_D(dc, a->rs2);
--
2.34.1
next prev parent reply other threads:[~2024-05-26 19:45 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-26 19:42 [PATCH v2 00/37] target/sparc: Implement VIS4 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 01/37] target/sparc: Fix ARRAY8 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 02/37] target/sparc: Rewrite gen_edge Richard Henderson
2024-05-26 19:42 ` [PATCH v2 03/37] target/sparc: Fix do_dc Richard Henderson
2024-06-04 11:41 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 04/37] target/sparc: Fix helper_fmul8ulx16 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 05/37] target/sparc: Perform DFPREG/QFPREG in decodetree Richard Henderson
2024-05-26 19:42 ` Richard Henderson [this message]
2024-05-26 19:42 ` [PATCH v2 07/37] target/sparc: Remove cpu_fpr[] Richard Henderson
2024-05-26 19:42 ` [PATCH v2 08/37] target/sparc: Use gvec for VIS1 parallel add/sub Richard Henderson
2024-06-04 13:18 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 09/37] target/sparc: Implement FMAf extension Richard Henderson
2024-05-26 19:42 ` [PATCH v2 10/37] target/sparc: Add feature bits for VIS 3 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 11/37] target/sparc: Implement ADDXC, ADDXCcc Richard Henderson
2024-05-26 19:42 ` [PATCH v2 12/37] target/sparc: Implement CMASK instructions Richard Henderson
2024-06-04 13:30 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 13/37] target/sparc: Implement FCHKSM16 Richard Henderson
2024-06-05 8:07 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 14/37] target/sparc: Implement FHADD, FHSUB, FNHADD, FNADD, FNMUL Richard Henderson
2024-05-26 19:42 ` [PATCH v2 15/37] target/sparc: Implement FLCMP Richard Henderson
2024-05-26 19:42 ` [PATCH v2 16/37] target/sparc: Implement FMEAN16 Richard Henderson
2024-06-04 13:33 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 17/37] target/sparc: Implement FPADD64, FPSUB64 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 18/37] target/sparc: Implement FPADDS, FPSUBS Richard Henderson
2024-06-05 8:04 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 19/37] target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8 Richard Henderson
2024-06-05 7:57 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 20/37] target/sparc: Implement FSLL, FSRL, FSRA, FSLAS Richard Henderson
2024-06-04 13:38 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 21/37] target/sparc: Implement LDXEFSR Richard Henderson
2024-06-05 7:55 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 22/37] target/sparc: Implement LZCNT Richard Henderson
2024-05-26 19:42 ` [PATCH v2 23/37] target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd Richard Henderson
2024-06-05 7:49 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 24/37] target/sparc: Implement PDISTN Richard Henderson
2024-05-26 19:42 ` [PATCH v2 25/37] target/sparc: Implement UMULXHI Richard Henderson
2024-06-04 13:40 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 26/37] target/sparc: Implement XMULX Richard Henderson
2024-06-04 13:41 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 27/37] target/sparc: Enable VIS3 feature bit Richard Henderson
2024-06-04 13:42 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 28/37] target/sparc: Implement IMA extension Richard Henderson
2024-05-26 19:42 ` [PATCH v2 29/37] target/sparc: Add feature bit for VIS4 Richard Henderson
2024-05-26 19:42 ` [PATCH v2 30/37] target/sparc: Implement FALIGNDATAi Richard Henderson
2024-06-05 7:35 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 31/37] target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS Richard Henderson
2024-05-26 19:42 ` [PATCH v2 32/37] target/sparc: Implement VIS4 comparisons Richard Henderson
2024-06-05 7:10 ` Philippe Mathieu-Daudé
2024-05-26 19:42 ` [PATCH v2 33/37] target/sparc: Implement FPMIN, FPMAX Richard Henderson
2024-05-26 19:42 ` [PATCH v2 34/37] target/sparc: Implement SUBXC, SUBXCcc Richard Henderson
2024-05-26 19:42 ` [PATCH v2 35/37] target/sparc: Implement MWAIT Richard Henderson
2024-06-05 7:27 ` Philippe Mathieu-Daudé
2024-06-05 16:11 ` Richard Henderson
2024-05-26 19:42 ` [PATCH v2 36/37] target/sparc: Implement monitor ASIs Richard Henderson
2024-05-26 19:42 ` [PATCH v2 37/37] target/sparc: Enable VIS4 feature bit Richard Henderson
2024-05-28 21:29 ` [PATCH v2 00/37] target/sparc: Implement VIS4 Mark Cave-Ayland
2024-06-04 6:25 ` Mark Cave-Ayland
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