From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH v3 19/33] target/arm: Use TCG_COND_TSTNE in gen_cmtst_vec
Date: Tue, 28 May 2024 13:30:30 -0700 [thread overview]
Message-ID: <20240528203044.612851-20-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240528203044.612851-1-richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/gengvec.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/arm/tcg/gengvec.c b/target/arm/tcg/gengvec.c
index e64ca02e0c..2451d23823 100644
--- a/target/arm/tcg/gengvec.c
+++ b/target/arm/tcg/gengvec.c
@@ -944,9 +944,7 @@ void gen_cmtst_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
static void gen_cmtst_vec(unsigned vece, TCGv_vec d, TCGv_vec a, TCGv_vec b)
{
- tcg_gen_and_vec(vece, d, a, b);
- tcg_gen_dupi_vec(vece, a, 0);
- tcg_gen_cmp_vec(TCG_COND_NE, vece, d, d, a);
+ tcg_gen_cmp_vec(TCG_COND_TSTNE, vece, d, a, b);
}
void gen_gvec_cmtst(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs,
--
2.34.1
next prev parent reply other threads:[~2024-05-28 20:33 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-28 20:30 [PATCH v3 00/33] target/arm: Convert a64 advsimd to decodetree (part 1b) Richard Henderson
2024-05-28 20:30 ` [PATCH v3 01/33] target/arm: Diagnose UNPREDICTABLE operands to PLD, PLDW, PLI Richard Henderson
2024-05-28 20:30 ` [PATCH v3 02/33] target/arm: Improve vector UQADD, UQSUB, SQADD, SQSUB Richard Henderson
2024-05-28 20:30 ` [PATCH v3 03/33] target/arm: Assert oprsz in range when using vfp.qc Richard Henderson
2024-05-30 14:14 ` Peter Maydell
2024-05-28 20:30 ` [PATCH v3 04/33] target/arm: Convert SUQADD and USQADD to gvec Richard Henderson
2024-05-30 14:18 ` Peter Maydell
2024-05-28 20:30 ` [PATCH v3 05/33] target/arm: Inline scalar SUQADD and USQADD Richard Henderson
2024-05-28 20:30 ` [PATCH v3 06/33] target/arm: Inline scalar SQADD, UQADD, SQSUB, UQSUB Richard Henderson
2024-05-28 20:30 ` [PATCH v3 07/33] target/arm: Convert SQADD, SQSUB, UQADD, UQSUB to decodetree Richard Henderson
2024-05-28 20:30 ` [PATCH v3 08/33] target/arm: Convert SUQADD, USQADD " Richard Henderson
2024-05-28 20:30 ` [PATCH v3 09/33] target/arm: Convert SSHL, USHL " Richard Henderson
2024-05-28 20:30 ` [PATCH v3 10/33] target/arm: Convert SRSHL and URSHL (register) to gvec Richard Henderson
2024-05-30 14:12 ` Peter Maydell
2024-05-28 20:30 ` [PATCH v3 11/33] target/arm: Convert SRSHL, URSHL to decodetree Richard Henderson
2024-05-28 20:30 ` [PATCH v3 12/33] target/arm: Convert SQSHL and UQSHL (register) to gvec Richard Henderson
2024-05-30 14:12 ` Peter Maydell
2024-05-28 20:30 ` [PATCH v3 13/33] target/arm: Convert SQSHL, UQSHL to decodetree Richard Henderson
2024-05-28 20:30 ` [PATCH v3 14/33] target/arm: Convert SQRSHL and UQRSHL (register) to gvec Richard Henderson
2024-05-28 20:30 ` [PATCH v3 15/33] target/arm: Convert SQRSHL, UQRSHL to decodetree Richard Henderson
2024-05-28 20:30 ` [PATCH v3 16/33] target/arm: Convert ADD, SUB (vector) " Richard Henderson
2024-05-28 20:30 ` [PATCH v3 17/33] target/arm: Convert CMGT, CMHI, CMGE, CMHS, CMTST, CMEQ " Richard Henderson
2024-05-28 20:30 ` [PATCH v3 18/33] target/arm: Use TCG_COND_TSTNE in gen_cmtst_{i32, i64} Richard Henderson
2024-05-28 20:30 ` Richard Henderson [this message]
2024-05-28 20:30 ` [PATCH v3 20/33] target/arm: Convert SHADD, UHADD to gvec Richard Henderson
2024-05-28 20:30 ` [PATCH v3 21/33] target/arm: Convert SHADD, UHADD to decodetree Richard Henderson
2024-05-28 20:30 ` [PATCH v3 22/33] target/arm: Convert SHSUB, UHSUB to gvec Richard Henderson
2024-05-28 20:30 ` [PATCH v3 23/33] target/arm: Convert SHSUB, UHSUB to decodetree Richard Henderson
2024-05-28 20:30 ` [PATCH v3 24/33] target/arm: Convert SRHADD, URHADD to gvec Richard Henderson
2024-05-28 20:30 ` [PATCH v3 25/33] target/arm: Convert SRHADD, URHADD to decodetree Richard Henderson
2024-05-28 20:30 ` [PATCH v3 26/33] target/arm: Convert SMAX, SMIN, UMAX, UMIN " Richard Henderson
2024-05-28 20:30 ` [PATCH v3 27/33] target/arm: Convert SABA, SABD, UABA, UABD " Richard Henderson
2024-05-28 20:30 ` [PATCH v3 28/33] target/arm: Convert MUL, PMUL " Richard Henderson
2024-05-28 20:30 ` [PATCH v3 29/33] target/arm: Convert MLA, MLS " Richard Henderson
2024-05-28 20:30 ` [PATCH v3 30/33] target/arm: Tidy SQDMULH, SQRDMULH (vector) Richard Henderson
2024-05-28 20:30 ` [PATCH v3 31/33] target/arm: Convert SQDMULH, SQRDMULH to decodetree Richard Henderson
2024-05-30 14:10 ` Peter Maydell
2024-05-28 20:30 ` [PATCH v3 32/33] target/arm: Convert FMADD, FMSUB, FNMADD, FNMSUB " Richard Henderson
2024-05-30 14:06 ` Peter Maydell
2024-05-28 20:30 ` [PATCH v3 33/33] target/arm: Convert FCSEL " Richard Henderson
2024-05-30 14:32 ` [PATCH v3 00/33] target/arm: Convert a64 advsimd to decodetree (part 1b) Peter Maydell
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