From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [PATCH 4/6] host/i386: assume presence of SSE2
Date: Fri, 31 May 2024 11:14:55 +0200 [thread overview]
Message-ID: <20240531091457.42200-5-pbonzini@redhat.com> (raw)
In-Reply-To: <20240531091457.42200-1-pbonzini@redhat.com>
QEMU now requires an x86-64-v2 host, which has SSE2.
Use it freely in buffer_is_zero.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
host/include/i386/host/cpuinfo.h | 1 -
util/bufferiszero.c | 2 +-
util/cpuinfo-i386.c | 1 -
3 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/host/include/i386/host/cpuinfo.h b/host/include/i386/host/cpuinfo.h
index 81771733eaa..72f6fad61e5 100644
--- a/host/include/i386/host/cpuinfo.h
+++ b/host/include/i386/host/cpuinfo.h
@@ -14,7 +14,6 @@
#define CPUINFO_POPCNT (1u << 4)
#define CPUINFO_BMI1 (1u << 5)
#define CPUINFO_BMI2 (1u << 6)
-#define CPUINFO_SSE2 (1u << 7)
#define CPUINFO_AVX1 (1u << 9)
#define CPUINFO_AVX2 (1u << 10)
#define CPUINFO_AVX512F (1u << 11)
diff --git a/util/bufferiszero.c b/util/bufferiszero.c
index 74864f7b782..6245976eca1 100644
--- a/util/bufferiszero.c
+++ b/util/bufferiszero.c
@@ -195,7 +195,7 @@ static unsigned best_accel(void)
return 2;
}
#endif
- return info & CPUINFO_SSE2 ? 1 : 0;
+ return 1;
}
#elif defined(__aarch64__) && defined(__ARM_NEON)
diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c
index 90f92a42dc8..ca74ef04f54 100644
--- a/util/cpuinfo-i386.c
+++ b/util/cpuinfo-i386.c
@@ -34,7 +34,6 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
if (max >= 1) {
__cpuid(1, a, b, c, d);
- info |= (d & bit_SSE2 ? CPUINFO_SSE2 : 0);
info |= (c & bit_MOVBE ? CPUINFO_MOVBE : 0);
info |= (c & bit_POPCNT ? CPUINFO_POPCNT : 0);
info |= (c & bit_PCLMUL ? CPUINFO_PCLMUL : 0);
--
2.45.1
next prev parent reply other threads:[~2024-05-31 9:16 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-31 9:14 [PATCH 0/6] host/i386: require x86-64-v2 ISA Paolo Bonzini
2024-05-31 9:14 ` [PATCH 1/6] host/i386: nothing looks at CPUINFO_SSE4 Paolo Bonzini
2024-05-31 12:55 ` Philippe Mathieu-Daudé
2024-06-02 9:28 ` Zhao Liu
2024-05-31 9:14 ` [PATCH 2/6] meson: assume x86-64-v2 baseline ISA Paolo Bonzini
2024-06-02 9:41 ` Zhao Liu
2024-05-31 9:14 ` [PATCH 3/6] host/i386: assume presence of CMOV Paolo Bonzini
2024-06-02 9:29 ` Zhao Liu
2024-05-31 9:14 ` Paolo Bonzini [this message]
2024-06-02 9:30 ` [PATCH 4/6] host/i386: assume presence of SSE2 Zhao Liu
2024-05-31 9:14 ` [PATCH 5/6] host/i386: assume presence of SSSE3 Paolo Bonzini
2024-06-02 9:32 ` Zhao Liu
2024-05-31 9:14 ` [PATCH 6/6] host/i386: assume presence of POPCNT Paolo Bonzini
2024-06-02 9:35 ` Zhao Liu
2024-05-31 17:43 ` [PATCH 0/6] host/i386: require x86-64-v2 ISA Richard Henderson
2024-06-06 16:52 ` Alexander Monakov
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