qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Alexander Monakov <amonakov@ispras.ru>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Alexander Monakov <amonakov@ispras.ru>
Subject: [PATCH 4/5] Revert "host/i386: assume presence of CMOV"
Date: Wed, 12 Jun 2024 13:55:24 +0300	[thread overview]
Message-ID: <20240612105525.8795-5-amonakov@ispras.ru> (raw)
In-Reply-To: <20240612105525.8795-1-amonakov@ispras.ru>

This reverts commit e68e97ce55b3d17af22dd62c3b3dc72f761b0862.

Revert in preparation to rolling back x86_64-v2 ISA requirement.

Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
---
 host/include/i386/host/cpuinfo.h |  1 +
 tcg/i386/tcg-target.c.inc        | 15 ++++++++++++++-
 util/cpuinfo-i386.c              |  1 +
 3 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/host/include/i386/host/cpuinfo.h b/host/include/i386/host/cpuinfo.h
index 81771733..9386c749 100644
--- a/host/include/i386/host/cpuinfo.h
+++ b/host/include/i386/host/cpuinfo.h
@@ -9,6 +9,7 @@
 /* Digested version of <cpuid.h> */
 
 #define CPUINFO_ALWAYS          (1u << 0)  /* so cpuinfo is nonzero */
+#define CPUINFO_CMOV            (1u << 1)
 #define CPUINFO_MOVBE           (1u << 2)
 #define CPUINFO_LZCNT           (1u << 3)
 #define CPUINFO_POPCNT          (1u << 4)
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 9a54ef7f..59235b4f 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -157,6 +157,12 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot)
 #define SOFTMMU_RESERVE_REGS \
     (tcg_use_softmmu ? (1 << TCG_REG_L0) | (1 << TCG_REG_L1) : 0)
 
+/* For 64-bit, we always know that CMOV is available.  */
+#if TCG_TARGET_REG_BITS == 64
+# define have_cmov      true
+#else
+# define have_cmov      (cpuinfo & CPUINFO_CMOV)
+#endif
 #define have_bmi2       (cpuinfo & CPUINFO_BMI2)
 #define have_lzcnt      (cpuinfo & CPUINFO_LZCNT)
 
@@ -1809,7 +1815,14 @@ static void tcg_out_setcond2(TCGContext *s, const TCGArg *args,
 static void tcg_out_cmov(TCGContext *s, int jcc, int rexw,
                          TCGReg dest, TCGReg v1)
 {
-    tcg_out_modrm(s, OPC_CMOVCC | jcc | rexw, dest, v1);
+    if (have_cmov) {
+        tcg_out_modrm(s, OPC_CMOVCC | jcc | rexw, dest, v1);
+    } else {
+        TCGLabel *over = gen_new_label();
+        tcg_out_jxx(s, jcc ^ 1, over, 1);
+        tcg_out_mov(s, TCG_TYPE_I32, dest, v1);
+        tcg_out_label(s, over);
+    }
 }
 
 static void tcg_out_movcond(TCGContext *s, int rexw, TCGCond cond,
diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c
index 90f92a42..18ab747a 100644
--- a/util/cpuinfo-i386.c
+++ b/util/cpuinfo-i386.c
@@ -34,6 +34,7 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
     if (max >= 1) {
         __cpuid(1, a, b, c, d);
 
+        info |= (d & bit_CMOV ? CPUINFO_CMOV : 0);
         info |= (d & bit_SSE2 ? CPUINFO_SSE2 : 0);
         info |= (c & bit_MOVBE ? CPUINFO_MOVBE : 0);
         info |= (c & bit_POPCNT ? CPUINFO_POPCNT : 0);
-- 
2.32.0



  parent reply	other threads:[~2024-06-12 10:57 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-12 10:55 [PATCH 0/5] Reinstate ability to use Qemu on pre-SSE4.1 x86 hosts Alexander Monakov
2024-06-12 10:55 ` [PATCH 1/5] Revert "host/i386: assume presence of POPCNT" Alexander Monakov
2024-06-12 10:55 ` [PATCH 2/5] Revert "host/i386: assume presence of SSSE3" Alexander Monakov
2024-06-12 10:55 ` [PATCH 3/5] Revert "host/i386: assume presence of SSE2" Alexander Monakov
2024-06-12 10:55 ` Alexander Monakov [this message]
2024-06-12 10:55 ` [PATCH 5/5] Revert "meson: assume x86-64-v2 baseline ISA" Alexander Monakov
2024-06-12 11:04 ` [PATCH 0/5] Reinstate ability to use Qemu on pre-SSE4.1 x86 hosts Daniel P. Berrangé
2024-06-12 11:12   ` Paolo Bonzini
2024-06-12 11:19     ` Alexander Monakov
2024-06-12 11:29       ` Paolo Bonzini
2024-06-12 11:46         ` Alexander Monakov
2024-06-12 11:58           ` Paolo Bonzini
2024-06-12 12:10             ` Alexander Monakov
2024-06-12 12:13               ` Paolo Bonzini
2024-06-12 13:34                 ` Alexander Monakov
2024-06-12 13:39                   ` Paolo Bonzini
2024-06-12 14:27                     ` Alexander Monakov
2024-06-12 11:38     ` Daniel P. Berrangé
2024-06-12 11:51       ` Paolo Bonzini
2024-06-12 12:21         ` Daniel P. Berrangé
2024-06-12 15:09           ` Daniel P. Berrangé
2024-06-12 15:29             ` Paolo Bonzini
2024-06-12 15:40             ` Alexander Monakov
2024-06-12 16:24               ` Daniel P. Berrangé
2024-06-12 17:06             ` Daniel P. Berrangé
2024-06-12 17:00         ` Daniel P. Berrangé
2024-06-12 17:08           ` Paolo Bonzini
2024-06-23 21:27     ` Alexander Monakov
2024-06-23 22:14       ` Richard Henderson
2024-06-12 11:14   ` Alexander Monakov

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240612105525.8795-5-amonakov@ispras.ru \
    --to=amonakov@ispras.ru \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).