From: Salil Mehta via <qemu-devel@nongnu.org>
To: <qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>, <mst@redhat.com>
Cc: <salil.mehta@huawei.com>, <maz@kernel.org>,
<jean-philippe@linaro.org>, <jonathan.cameron@huawei.com>,
<lpieralisi@kernel.org>, <peter.maydell@linaro.org>,
<richard.henderson@linaro.org>, <imammedo@redhat.com>,
<andrew.jones@linux.dev>, <david@redhat.com>, <philmd@linaro.org>,
<eric.auger@redhat.com>, <will@kernel.org>, <ardb@kernel.org>,
<oliver.upton@linux.dev>, <pbonzini@redhat.com>,
<gshan@redhat.com>, <rafael@kernel.org>,
<borntraeger@linux.ibm.com>, <alex.bennee@linaro.org>,
<npiggin@gmail.com>, <harshpb@linux.ibm.com>,
<linux@armlinux.org.uk>, <darren@os.amperecomputing.com>,
<ilkka@os.amperecomputing.com>, <vishnu@os.amperecomputing.com>,
<karl.heubaum@oracle.com>, <miguel.luis@oracle.com>,
<salil.mehta@opnsrc.net>, <zhukeqian1@huawei.com>,
<wangxiongfeng2@huawei.com>, <wangyanan55@huawei.com>,
<jiakernel2@gmail.com>, <maobibo@loongson.cn>,
<lixianglai@loongson.cn>, <shahuang@redhat.com>,
<zhao1.liu@intel.com>, <linuxarm@huawei.com>
Subject: [PATCH RFC V3 14/29] hw/acpi: ACPI/AML Changes to reflect the correct _STA.{PRES, ENA} Bits to Guest
Date: Fri, 14 Jun 2024 00:36:24 +0100 [thread overview]
Message-ID: <20240613233639.202896-15-salil.mehta@huawei.com> (raw)
In-Reply-To: <20240613233639.202896-1-salil.mehta@huawei.com>
ACPI AML changes are required to properly reflect the `_STA.PRES` and `_STA.ENA`
bits to the guest during initialization, when CPUs are hot-plugged, and after
CPUs are hot-unplugged.
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
---
hw/acpi/cpu.c | 53 ++++++++++++++++++++++++++++++----
hw/acpi/generic_event_device.c | 11 +++++++
include/hw/acpi/cpu.h | 2 ++
3 files changed, 61 insertions(+), 5 deletions(-)
diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c
index 4c63514b16..40b8899125 100644
--- a/hw/acpi/cpu.c
+++ b/hw/acpi/cpu.c
@@ -64,10 +64,11 @@ static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
cdev = &cpu_st->devs[cpu_st->selector];
switch (addr) {
case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */
- val |= cdev->cpu ? 1 : 0;
+ val |= cdev->is_enabled ? 1 : 0;
val |= cdev->is_inserting ? 2 : 0;
val |= cdev->is_removing ? 4 : 0;
val |= cdev->fw_remove ? 16 : 0;
+ val |= cdev->is_present ? 32 : 0;
trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
break;
case ACPI_CPU_CMD_DATA_OFFSET_RW:
@@ -230,7 +231,23 @@ void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
state->dev_count = id_list->len;
state->devs = g_new0(typeof(*state->devs), state->dev_count);
for (i = 0; i < id_list->len; i++) {
- state->devs[i].cpu = CPU(id_list->cpus[i].cpu);
+ struct CPUState *cpu = CPU(id_list->cpus[i].cpu);
+ /*
+ * In most archs, CPUs which are ACPI 'present' are also ACPI 'enabled'
+ * by default. And these states are consistent at QOM and ACPI level.
+ */
+ if (qemu_enabled_cpu(cpu)) {
+ state->devs[i].cpu = cpu;
+ state->devs[i].is_present = true;
+ state->devs[i].is_enabled = true;
+ } else {
+ state->devs[i].is_enabled = false;
+ /*
+ * Some archs might expose 'disabled' QOM CPUs as ACPI 'present'.
+ * Hence, these states at QOM and ACPI level might be inconsistent.
+ */
+ state->devs[i].is_present = qemu_present_cpu(cpu);
+ }
state->devs[i].arch_id = id_list->cpus[i].arch_id;
}
memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state,
@@ -263,6 +280,8 @@ void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
}
cdev->cpu = CPU(dev);
+ cdev->is_present = true;
+ cdev->is_enabled = true;
if (dev->hotplugged) {
cdev->is_inserting = true;
acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
@@ -294,6 +313,11 @@ void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st,
return;
}
+ cdev->is_enabled = false;
+ if (!qemu_persistent_cpu(CPU(dev))) {
+ cdev->is_present = false;
+ }
+
cdev->cpu = NULL;
}
@@ -304,6 +328,8 @@ static const VMStateDescription vmstate_cpuhp_sts = {
.fields = (const VMStateField[]) {
VMSTATE_BOOL(is_inserting, AcpiCpuStatus),
VMSTATE_BOOL(is_removing, AcpiCpuStatus),
+ VMSTATE_BOOL(is_present, AcpiCpuStatus),
+ VMSTATE_BOOL(is_enabled, AcpiCpuStatus),
VMSTATE_UINT32(ost_event, AcpiCpuStatus),
VMSTATE_UINT32(ost_status, AcpiCpuStatus),
VMSTATE_END_OF_LIST()
@@ -341,6 +367,7 @@ const VMStateDescription vmstate_cpu_hotplug = {
#define CPU_REMOVE_EVENT "CRMV"
#define CPU_EJECT_EVENT "CEJ0"
#define CPU_FW_EJECT_EVENT "CEJF"
+#define CPU_PRESENT "CPRS"
void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
build_madt_cpu_fn build_madt_cpu, hwaddr base_addr,
@@ -399,7 +426,9 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1));
/* tell firmware to do device eject, write only */
aml_append(field, aml_named_field(CPU_FW_EJECT_EVENT, 1));
- aml_append(field, aml_reserved_field(3));
+ /* 1 if present, read only */
+ aml_append(field, aml_named_field(CPU_PRESENT, 1));
+ aml_append(field, aml_reserved_field(2));
aml_append(field, aml_named_field(CPU_COMMAND, 8));
aml_append(cpu_ctrl_dev, field);
@@ -429,6 +458,7 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK);
Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR);
Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED);
+ Aml *is_present = aml_name("%s.%s", cphp_res_path, CPU_PRESENT);
Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND);
Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA);
Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT);
@@ -457,13 +487,26 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
{
Aml *idx = aml_arg(0);
Aml *sta = aml_local(0);
+ Aml *ifctx2;
+ Aml *else_ctx;
aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
aml_append(method, aml_store(idx, cpu_selector));
aml_append(method, aml_store(zero, sta));
- ifctx = aml_if(aml_equal(is_enabled, one));
+ ifctx = aml_if(aml_equal(is_present, one));
{
- aml_append(ifctx, aml_store(aml_int(0xF), sta));
+ ifctx2 = aml_if(aml_equal(is_enabled, one));
+ {
+ /* cpu is present and enabled */
+ aml_append(ifctx2, aml_store(aml_int(0xF), sta));
+ }
+ aml_append(ifctx, ifctx2);
+ else_ctx = aml_else();
+ {
+ /* cpu is present but disabled */
+ aml_append(else_ctx, aml_store(aml_int(0xD), sta));
+ }
+ aml_append(ifctx, else_ctx);
}
aml_append(method, ifctx);
aml_append(method, aml_release(ctrl_lock));
diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
index 63226b0040..e92ce07955 100644
--- a/hw/acpi/generic_event_device.c
+++ b/hw/acpi/generic_event_device.c
@@ -333,6 +333,16 @@ static const VMStateDescription vmstate_memhp_state = {
}
};
+static const VMStateDescription vmstate_cpuhp_state = {
+ .name = "acpi-ged/cpuhp",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_CPU_HOTPLUG(cpuhp_state, AcpiGedState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static const VMStateDescription vmstate_ged_state = {
.name = "acpi-ged-state",
.version_id = 1,
@@ -381,6 +391,7 @@ static const VMStateDescription vmstate_acpi_ged = {
},
.subsections = (const VMStateDescription * const []) {
&vmstate_memhp_state,
+ &vmstate_cpuhp_state,
&vmstate_ghes_state,
NULL
}
diff --git a/include/hw/acpi/cpu.h b/include/hw/acpi/cpu.h
index 48cded697c..07b524b713 100644
--- a/include/hw/acpi/cpu.h
+++ b/include/hw/acpi/cpu.h
@@ -24,6 +24,8 @@ typedef struct AcpiCpuStatus {
uint64_t arch_id;
bool is_inserting;
bool is_removing;
+ bool is_present;
+ bool is_enabled;
bool fw_remove;
uint32_t ost_event;
uint32_t ost_status;
--
2.34.1
next prev parent reply other threads:[~2024-06-13 23:43 UTC|newest]
Thread overview: 105+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-13 23:36 [PATCH RFC V3 00/29] Support of Virtual CPU Hotplug for ARMv8 Arch Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 01/29] arm/virt, target/arm: Add new ARMCPU {socket, cluster, core, thread}-id property Salil Mehta via
2024-08-12 4:35 ` [PATCH RFC V3 01/29] arm/virt,target/arm: Add new ARMCPU {socket,cluster,core,thread}-id property Gavin Shan
2024-08-12 8:15 ` Igor Mammedov
2024-08-13 0:31 ` Gavin Shan
2024-08-19 12:07 ` Salil Mehta via
2024-08-19 11:53 ` Salil Mehta via
2024-09-04 14:42 ` zhao1.liu
2024-09-04 17:37 ` Salil Mehta via
2024-09-09 15:28 ` Zhao Liu
2024-09-10 11:01 ` Salil Mehta via
2024-09-11 11:35 ` Jonathan Cameron via
2024-09-11 12:25 ` Salil Mehta
2024-06-13 23:36 ` [PATCH RFC V3 02/29] cpu-common: Add common CPU utility for possible vCPUs Salil Mehta via
2024-07-04 3:12 ` Nicholas Piggin
2024-08-12 4:59 ` Gavin Shan
2024-08-12 5:41 ` 回复: " liu ping
2024-06-13 23:36 ` [PATCH RFC V3 03/29] hw/arm/virt: Limit number of possible vCPUs for unsupported Accel or GIC Type Salil Mehta via
2024-08-12 5:09 ` Gavin Shan
2024-06-13 23:36 ` [PATCH RFC V3 04/29] hw/arm/virt: Move setting of common CPU properties in a function Salil Mehta via
2024-08-12 5:19 ` Gavin Shan
2024-06-13 23:36 ` [PATCH RFC V3 05/29] arm/virt, target/arm: Machine init time change common to vCPU {cold|hot}-plug Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 06/29] arm/virt, kvm: Pre-create disabled possible vCPUs @machine init Salil Mehta via
2024-08-13 0:58 ` [PATCH RFC V3 06/29] arm/virt,kvm: " Gavin Shan
2024-08-19 5:31 ` Gavin Shan
2024-08-19 13:06 ` Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 07/29] arm/virt, gicv3: Changes to pre-size GIC with possible vcpus " Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 08/29] arm/virt: Init PMU at host for all possible vcpus Salil Mehta via
2024-07-04 3:07 ` Nicholas Piggin
2024-07-04 12:03 ` Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 09/29] arm/acpi: Enable ACPI support for vcpu hotplug Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 10/29] arm/virt: Add cpu hotplug events to GED during creation Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 11/29] arm/virt: Create GED dev before *disabled* CPU Objs are destroyed Salil Mehta via
2024-08-13 1:04 ` Gavin Shan
2024-08-19 12:10 ` Salil Mehta via
2024-08-20 0:22 ` Gavin Shan
2024-08-20 17:10 ` Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 12/29] arm/virt/acpi: Build CPUs AML with CPU Hotplug support Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 13/29] arm/virt: Make ARM vCPU *present* status ACPI *persistent* Salil Mehta via
2024-07-04 2:49 ` Nicholas Piggin
2024-07-04 11:23 ` Salil Mehta via
2024-07-05 0:08 ` Nicholas Piggin
2024-06-13 23:36 ` Salil Mehta via [this message]
2024-06-13 23:36 ` [PATCH RFC V3 15/29] hw/arm: MADT Tbl change to size the guest with possible vCPUs Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 16/29] hw/acpi: Make _MAT method optional Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 17/29] arm/virt: Release objects for *disabled* possible vCPUs after init Salil Mehta via
2024-08-13 1:17 ` Gavin Shan
2024-08-19 12:21 ` Salil Mehta via
2024-08-20 0:05 ` Gavin Shan
2024-08-20 16:40 ` Salil Mehta via
2024-08-21 6:25 ` Gavin Shan
2024-08-21 10:23 ` Salil Mehta via
2024-08-21 13:32 ` Gavin Shan
2024-08-22 10:58 ` Salil Mehta via
2024-08-23 10:52 ` Gavin Shan
2024-08-23 13:17 ` Salil Mehta via
2024-08-24 10:03 ` Gavin Shan
2024-06-13 23:36 ` [PATCH RFC V3 18/29] arm/virt: Add/update basic hot-(un)plug framework Salil Mehta via
2024-08-13 1:21 ` Gavin Shan
2024-08-19 12:30 ` Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 19/29] arm/virt: Changes to (un)wire GICC<->vCPU IRQs during hot-(un)plug Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 20/29] hw/arm, gicv3: Changes to update GIC with vCPU hot-plug notification Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 21/29] hw/intc/arm-gicv3*: Changes required to (re)init the vCPU register info Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 22/29] arm/virt: Update the guest(via GED) about CPU hot-(un)plug events Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 23/29] hw/arm: Changes required for reset and to support next boot Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 24/29] target/arm: Add support of *unrealize* ARMCPU during vCPU Hot-unplug Salil Mehta via
2024-08-16 15:37 ` Alex Bennée
2024-08-16 15:50 ` Peter Maydell
2024-08-16 17:00 ` Peter Maydell
2024-08-19 12:59 ` Salil Mehta via
2024-08-19 13:43 ` Peter Maydell
2024-08-19 12:58 ` Salil Mehta via
2024-08-19 13:46 ` Peter Maydell
2024-08-20 15:34 ` Salil Mehta via
2024-08-19 12:35 ` Salil Mehta via
2024-08-28 20:23 ` Gustavo Romero
2024-09-04 13:53 ` Salil Mehta via
2024-06-13 23:36 ` [PATCH RFC V3 25/29] target/arm/kvm: Write CPU state back to KVM on reset Salil Mehta via
2024-07-04 3:27 ` Nicholas Piggin
2024-07-04 12:27 ` Salil Mehta via
2024-06-14 0:15 ` [PATCH RFC V3 26/29] target/arm/kvm, tcg: Register/Handle SMCCC hypercall exits to VMM/Qemu Salil Mehta via
2024-06-14 0:18 ` [PATCH RFC V3 27/29] hw/arm: Support hotplug capability check using _OSC method Salil Mehta via
2024-06-14 0:19 ` [PATCH RFC V3 28/29] tcg/mttcg: enable threads to unregister in tcg_ctxs[] Salil Mehta via
2024-06-14 0:20 ` [PATCH RFC V3 29/29] hw/arm/virt: Expose cold-booted CPUs as MADT GICC Enabled Salil Mehta via
2024-06-26 9:53 ` [PATCH RFC V3 00/29] Support of Virtual CPU Hotplug for ARMv8 Arch Vishnu Pajjuri
2024-06-26 18:01 ` Salil Mehta via
2024-07-01 11:38 ` Miguel Luis
2024-07-01 16:30 ` Salil Mehta via
2024-08-07 9:53 ` Gavin Shan
2024-08-07 13:27 ` Salil Mehta via
2024-08-07 16:07 ` Salil Mehta via
2024-08-08 5:00 ` Gavin Shan
2024-08-07 23:41 ` Gavin Shan
2024-08-07 23:48 ` Salil Mehta via
2024-08-08 0:29 ` Gavin Shan
2024-08-08 4:15 ` Gavin Shan
2024-08-08 8:39 ` Salil Mehta via
2024-08-08 8:36 ` Salil Mehta via
2024-08-28 20:35 ` Gustavo Romero
2024-08-29 9:59 ` Alex Bennée
2024-09-04 14:24 ` Salil Mehta via
2024-09-04 15:45 ` Alex Bennée
2024-09-04 15:59 ` Salil Mehta via
2024-09-06 15:06 ` Salil Mehta via
2024-09-04 14:03 ` Salil Mehta via
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