From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-stable@nongnu.org, Song Gao <gaosong@loongson.cn>
Subject: [PULL 24/24] tcg/loongarch64: Fix tcg_out_movi vs some pcrel pointers
Date: Wed, 19 Jun 2024 13:59:52 -0700 [thread overview]
Message-ID: <20240619205952.235946-25-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240619205952.235946-1-richard.henderson@linaro.org>
Simplify the logic for two-part, 32-bit pc-relative addresses.
Rather than assume all such fit in int32_t, do some arithmetic
and assert a result, do some arithmetic first and then check
to see if the pieces are in range.
Cc: qemu-stable@nongnu.org
Fixes: dacc51720db ("tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi")
Reviewed-by: Song Gao <gaosong@loongson.cn>
Reported-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.c.inc | 32 +++++++++++++++-----------------
1 file changed, 15 insertions(+), 17 deletions(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 1c4dc4decb..5b7ed5c176 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -382,8 +382,7 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd,
* back to the slow path.
*/
- intptr_t pc_offset;
- tcg_target_long val_lo, val_hi, pc_hi, offset_hi;
+ intptr_t src_rx, pc_offset;
tcg_target_long hi12, hi32, hi52;
/* Value fits in signed i32. */
@@ -393,24 +392,23 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd,
}
/* PC-relative cases. */
- pc_offset = tcg_pcrel_diff(s, (void *)val);
- if (pc_offset == sextreg(pc_offset, 0, 22) && (pc_offset & 3) == 0) {
- /* Single pcaddu2i. */
- tcg_out_opc_pcaddu2i(s, rd, pc_offset >> 2);
- return;
+ src_rx = (intptr_t)tcg_splitwx_to_rx(s->code_ptr);
+ if ((val & 3) == 0) {
+ pc_offset = val - src_rx;
+ if (pc_offset == sextreg(pc_offset, 0, 22)) {
+ /* Single pcaddu2i. */
+ tcg_out_opc_pcaddu2i(s, rd, pc_offset >> 2);
+ return;
+ }
}
- if (pc_offset == (int32_t)pc_offset) {
- /* Offset within 32 bits; load with pcalau12i + ori. */
- val_lo = sextreg(val, 0, 12);
- val_hi = val >> 12;
- pc_hi = (val - pc_offset) >> 12;
- offset_hi = val_hi - pc_hi;
-
- tcg_debug_assert(offset_hi == sextreg(offset_hi, 0, 20));
- tcg_out_opc_pcalau12i(s, rd, offset_hi);
+ pc_offset = (val >> 12) - (src_rx >> 12);
+ if (pc_offset == sextreg(pc_offset, 0, 20)) {
+ /* Load with pcalau12i + ori. */
+ tcg_target_long val_lo = val & 0xfff;
+ tcg_out_opc_pcalau12i(s, rd, pc_offset);
if (val_lo != 0) {
- tcg_out_opc_ori(s, rd, rd, val_lo & 0xfff);
+ tcg_out_opc_ori(s, rd, rd, val_lo);
}
return;
}
--
2.34.1
next prev parent reply other threads:[~2024-06-19 21:01 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-19 20:59 [PULL 00/24] tcg patch queue Richard Henderson
2024-06-19 20:59 ` [PULL 01/24] tcg/loongarch64: Import LASX, FP insns Richard Henderson
2024-06-19 20:59 ` [PULL 02/24] tcg/loongarch64: Use fp load/store for I32 and I64 into vector regs Richard Henderson
2024-06-19 20:59 ` [PULL 03/24] tcg/loongarch64: Handle i32 and i64 moves between gr and fr Richard Henderson
2024-06-19 20:59 ` [PULL 04/24] tcg/loongarch64: Support TCG_TYPE_V64 Richard Henderson
2024-06-19 20:59 ` [PULL 05/24] util/loongarch64: Detect LASX vector support Richard Henderson
2024-06-19 20:59 ` [PULL 06/24] tcg/loongarch64: Simplify tcg_out_dup_vec Richard Henderson
2024-06-19 20:59 ` [PULL 07/24] tcg/loongarch64: Support LASX in tcg_out_dup_vec Richard Henderson
2024-06-19 20:59 ` [PULL 08/24] tcg/loongarch64: Support LASX in tcg_out_dupm_vec Richard Henderson
2024-06-19 20:59 ` [PULL 09/24] tcg/loongarch64: Use tcg_out_dup_vec in tcg_out_dupi_vec Richard Henderson
2024-06-19 20:59 ` [PULL 10/24] tcg/loongarch64: Support LASX " Richard Henderson
2024-06-19 20:59 ` [PULL 11/24] tcg/loongarch64: Simplify tcg_out_addsub_vec Richard Henderson
2024-06-19 20:59 ` [PULL 12/24] tcg/loongarch64: Support LASX in tcg_out_addsub_vec Richard Henderson
2024-06-19 20:59 ` [PULL 13/24] tcg/loongarch64: Split out vdvjvk in tcg_out_vec_op Richard Henderson
2024-06-19 20:59 ` [PULL 14/24] tcg/loongarch64: Support LASX in tcg_out_{mov,ld,st} Richard Henderson
2024-06-19 20:59 ` [PULL 15/24] tcg/loongarch64: Remove temp_vec from tcg_out_vec_op Richard Henderson
2024-06-19 20:59 ` [PULL 16/24] tcg/loongarch64: Split out vdvjukN in tcg_out_vec_op Richard Henderson
2024-06-19 20:59 ` [PULL 17/24] tcg/loongarch64: Support LASX " Richard Henderson
2024-06-19 20:59 ` [PULL 18/24] tcg/loongarch64: Enable v256 with LASX Richard Henderson
2024-06-19 20:59 ` [PULL 19/24] util/bufferiszero: Split out host include files Richard Henderson
2024-06-19 20:59 ` [PULL 20/24] util/bufferiszero: Add loongarch64 vector acceleration Richard Henderson
2024-06-19 20:59 ` [PULL 21/24] accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded Richard Henderson
2024-06-19 20:59 ` [PULL 22/24] linux-user: Make TARGET_NR_setgroups affect only the current thread Richard Henderson
2024-06-19 20:59 ` [PULL 23/24] target/sparc: use signed denominator in sdiv helper Richard Henderson
2024-06-19 20:59 ` Richard Henderson [this message]
2024-06-20 4:45 ` [PULL 00/24] tcg patch queue Richard Henderson
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