From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [PATCH 01/10] target/i386: use cpu_cc_dst for CC_OP_POPCNT
Date: Thu, 20 Jun 2024 11:54:10 +0200 [thread overview]
Message-ID: <20240620095419.386958-2-pbonzini@redhat.com> (raw)
In-Reply-To: <20240620095419.386958-1-pbonzini@redhat.com>
It is the only POPCNT that computes ZF from one of the cc_op_* registers,
but it uses cpu_cc_src instead of cpu_cc_dst like the others. Do not
make it the odd one off.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/cpu.h | 2 +-
target/i386/tcg/cc_helper.c | 2 +-
target/i386/tcg/translate.c | 2 +-
target/i386/tcg/emit.c.inc | 4 ++--
4 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 7e2a9b56aea..f54cd93b3f9 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1332,7 +1332,7 @@ typedef enum {
CC_OP_BMILGQ,
CC_OP_CLR, /* Z set, all other flags clear. */
- CC_OP_POPCNT, /* Z via CC_SRC, all other flags clear. */
+ CC_OP_POPCNT, /* Z via CC_DST, all other flags clear. */
CC_OP_NB,
} CCOp;
diff --git a/target/i386/tcg/cc_helper.c b/target/i386/tcg/cc_helper.c
index f76e9cb8cfb..301ed954064 100644
--- a/target/i386/tcg/cc_helper.c
+++ b/target/i386/tcg/cc_helper.c
@@ -107,7 +107,7 @@ target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1,
case CC_OP_CLR:
return CC_Z | CC_P;
case CC_OP_POPCNT:
- return src1 ? 0 : CC_Z;
+ return dst ? 0 : CC_Z;
case CC_OP_MULB:
return compute_all_mulb(dst, src1);
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index ad1819815ab..f32cda4e169 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -324,7 +324,7 @@ static const uint8_t cc_op_live[CC_OP_NB] = {
[CC_OP_ADOX] = USES_CC_SRC | USES_CC_SRC2,
[CC_OP_ADCOX] = USES_CC_DST | USES_CC_SRC | USES_CC_SRC2,
[CC_OP_CLR] = 0,
- [CC_OP_POPCNT] = USES_CC_SRC,
+ [CC_OP_POPCNT] = USES_CC_DST,
};
static void set_cc_op_1(DisasContext *s, CCOp op, bool dirty)
diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index 11faa70b5e2..fc7477833bc 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -2804,10 +2804,10 @@ static void gen_POPA(DisasContext *s, X86DecodedInsn *decode)
static void gen_POPCNT(DisasContext *s, X86DecodedInsn *decode)
{
- decode->cc_src = tcg_temp_new();
+ decode->cc_dst = tcg_temp_new();
decode->cc_op = CC_OP_POPCNT;
- tcg_gen_mov_tl(decode->cc_src, s->T0);
+ tcg_gen_mov_tl(decode->cc_dst, s->T0);
tcg_gen_ctpop_tl(s->T0, s->T0);
}
--
2.45.2
next prev parent reply other threads:[~2024-06-20 9:56 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-20 9:54 [PATCH 00/10] target/i386: make decoding entirely table based Paolo Bonzini
2024-06-20 9:54 ` Paolo Bonzini [this message]
2024-06-20 15:02 ` [PATCH 01/10] target/i386: use cpu_cc_dst for CC_OP_POPCNT Richard Henderson
2024-06-20 9:54 ` [PATCH 02/10] target/i386: give CC_OP_POPCNT low bits corresponding to MO_TL Paolo Bonzini
2024-06-20 15:10 ` Richard Henderson
2024-06-20 9:54 ` [PATCH 03/10] target/i386: convert bit test instructions to new decoder Paolo Bonzini
2024-06-20 15:22 ` Richard Henderson
2024-06-20 9:54 ` [PATCH 04/10] target/i386: try not to force EFLAGS computation for CC_OP_ADOX/ADCX Paolo Bonzini
2024-06-20 15:56 ` Richard Henderson
2024-06-20 9:54 ` [PATCH 05/10] target/i386: decode address before going back to translate.c Paolo Bonzini
2024-06-20 9:54 ` [PATCH 06/10] target/i386: convert CMPXCHG8B/CMPXCHG16B to new decoder Paolo Bonzini
2024-06-20 16:14 ` Richard Henderson
2024-06-20 9:54 ` [PATCH 07/10] target/i386: do not check PREFIX_LOCK in old-style decoder Paolo Bonzini
2024-06-20 9:54 ` [PATCH 08/10] target/i386: list instructions still in translate.c Paolo Bonzini
2024-06-20 9:54 ` [PATCH 09/10] target/i386: assert that cc_op* and pc_save are preserved Paolo Bonzini
2024-06-20 9:54 ` [PATCH 10/10] target/i386: remove gen_ext_tl Paolo Bonzini
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