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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [PULL 02/23] target/i386: fix CC_OP dump
Date: Sat, 22 Jun 2024 08:15:36 +0200	[thread overview]
Message-ID: <20240622061558.530543-3-pbonzini@redhat.com> (raw)
In-Reply-To: <20240622061558.530543-1-pbonzini@redhat.com>

POPCNT was missing, and the entries were all out of order after
ADCX/ADOX/ADCOX were moved close to EFLAGS.  Just use designated
initializers.

Fixes: 4885c3c4953 ("target-i386: Use ctpop helper", 2017-01-10)
Fixes: cc155f19717 ("target/i386: rewrite flags writeback for ADCX/ADOX", 2024-06-11)
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/cpu-dump.c | 101 +++++++++++++++++++++--------------------
 1 file changed, 51 insertions(+), 50 deletions(-)

diff --git a/target/i386/cpu-dump.c b/target/i386/cpu-dump.c
index 40697064d92..3bb8e440916 100644
--- a/target/i386/cpu-dump.c
+++ b/target/i386/cpu-dump.c
@@ -28,69 +28,70 @@
 /* x86 debug */
 
 static const char *cc_op_str[CC_OP_NB] = {
-    "DYNAMIC",
-    "EFLAGS",
+    [CC_OP_DYNAMIC] = "DYNAMIC",
 
-    "MULB",
-    "MULW",
-    "MULL",
-    "MULQ",
+    [CC_OP_EFLAGS] = "EFLAGS",
+    [CC_OP_ADCX] = "ADCX",
+    [CC_OP_ADOX] = "ADOX",
+    [CC_OP_ADCOX] = "ADCOX",
 
-    "ADDB",
-    "ADDW",
-    "ADDL",
-    "ADDQ",
+    [CC_OP_MULB] = "MULB",
+    [CC_OP_MULW] = "MULW",
+    [CC_OP_MULL] = "MULL",
+    [CC_OP_MULQ] = "MULQ",
 
-    "ADCB",
-    "ADCW",
-    "ADCL",
-    "ADCQ",
+    [CC_OP_ADDB] = "ADDB",
+    [CC_OP_ADDW] = "ADDW",
+    [CC_OP_ADDL] = "ADDL",
+    [CC_OP_ADDQ] = "ADDQ",
 
-    "SUBB",
-    "SUBW",
-    "SUBL",
-    "SUBQ",
+    [CC_OP_ADCB] = "ADCB",
+    [CC_OP_ADCW] = "ADCW",
+    [CC_OP_ADCL] = "ADCL",
+    [CC_OP_ADCQ] = "ADCQ",
 
-    "SBBB",
-    "SBBW",
-    "SBBL",
-    "SBBQ",
+    [CC_OP_SUBB] = "SUBB",
+    [CC_OP_SUBW] = "SUBW",
+    [CC_OP_SUBL] = "SUBL",
+    [CC_OP_SUBQ] = "SUBQ",
 
-    "LOGICB",
-    "LOGICW",
-    "LOGICL",
-    "LOGICQ",
+    [CC_OP_SBBB] = "SBBB",
+    [CC_OP_SBBW] = "SBBW",
+    [CC_OP_SBBL] = "SBBL",
+    [CC_OP_SBBQ] = "SBBQ",
 
-    "INCB",
-    "INCW",
-    "INCL",
-    "INCQ",
+    [CC_OP_LOGICB] = "LOGICB",
+    [CC_OP_LOGICW] = "LOGICW",
+    [CC_OP_LOGICL] = "LOGICL",
+    [CC_OP_LOGICQ] = "LOGICQ",
 
-    "DECB",
-    "DECW",
-    "DECL",
-    "DECQ",
+    [CC_OP_INCB] = "INCB",
+    [CC_OP_INCW] = "INCW",
+    [CC_OP_INCL] = "INCL",
+    [CC_OP_INCQ] = "INCQ",
 
-    "SHLB",
-    "SHLW",
-    "SHLL",
-    "SHLQ",
+    [CC_OP_DECB] = "DECB",
+    [CC_OP_DECW] = "DECW",
+    [CC_OP_DECL] = "DECL",
+    [CC_OP_DECQ] = "DECQ",
 
-    "SARB",
-    "SARW",
-    "SARL",
-    "SARQ",
+    [CC_OP_SHLB] = "SHLB",
+    [CC_OP_SHLW] = "SHLW",
+    [CC_OP_SHLL] = "SHLL",
+    [CC_OP_SHLQ] = "SHLQ",
 
-    "BMILGB",
-    "BMILGW",
-    "BMILGL",
-    "BMILGQ",
+    [CC_OP_SARB] = "SARB",
+    [CC_OP_SARW] = "SARW",
+    [CC_OP_SARL] = "SARL",
+    [CC_OP_SARQ] = "SARQ",
 
-    "ADCX",
-    "ADOX",
-    "ADCOX",
+    [CC_OP_BMILGB] = "BMILGB",
+    [CC_OP_BMILGW] = "BMILGW",
+    [CC_OP_BMILGL] = "BMILGL",
+    [CC_OP_BMILGQ] = "BMILGQ",
 
-    "CLR",
+    [CC_OP_POPCNT] = "POPCNT",
+    [CC_OP_CLR] = "CLR",
 };
 
 static void
-- 
2.45.2



  parent reply	other threads:[~2024-06-22  6:19 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-22  6:15 [PULL 00/23] Misc changes for 2024-06-22 Paolo Bonzini
2024-06-22  6:15 ` [PULL 01/23] configure: detect --cpu=mipsisa64r6 Paolo Bonzini
2024-06-22  6:15 ` Paolo Bonzini [this message]
2024-06-22  6:15 ` [PULL 03/23] target/i386: use cpu_cc_dst for CC_OP_POPCNT Paolo Bonzini
2024-06-22  6:15 ` [PULL 04/23] target/i386: give CC_OP_POPCNT low bits corresponding to MO_TL Paolo Bonzini
2024-06-22  6:15 ` [PULL 05/23] target/i386: convert bit test instructions to new decoder Paolo Bonzini
2024-06-22  6:15 ` [PULL 06/23] target/i386: try not to force EFLAGS computation for CC_OP_ADOX/ADCX Paolo Bonzini
2024-06-22  6:15 ` [PULL 07/23] target/i386: decode address before going back to translate.c Paolo Bonzini
2024-06-22  6:15 ` [PULL 08/23] target/i386: convert CMPXCHG8B/CMPXCHG16B to new decoder Paolo Bonzini
2024-06-22  6:15 ` [PULL 09/23] target/i386: do not check PREFIX_LOCK in old-style decoder Paolo Bonzini
2024-06-22  6:15 ` [PULL 10/23] target/i386: list instructions still in translate.c Paolo Bonzini
2024-06-22  6:15 ` [PULL 11/23] target/i386: assert that cc_op* and pc_save are preserved Paolo Bonzini
2024-06-22  6:15 ` [PULL 12/23] target/i386: remove gen_ext_tl Paolo Bonzini
2024-06-22  6:15 ` [PULL 13/23] Revert "host/i386: assume presence of POPCNT" Paolo Bonzini
2024-06-22  6:15 ` [PULL 14/23] Revert "host/i386: assume presence of SSSE3" Paolo Bonzini
2024-06-22  6:15 ` [PULL 15/23] Revert "host/i386: assume presence of SSE2" Paolo Bonzini
2024-06-22 16:55   ` Richard Henderson
2024-06-22  6:15 ` [PULL 16/23] meson: allow configuring the x86-64 baseline Paolo Bonzini
2024-06-22  6:15 ` [PULL 17/23] meson: remove dead optimization option Paolo Bonzini
2024-06-22  6:15 ` [PULL 18/23] block: make assertion more generic Paolo Bonzini
2024-06-22  6:15 ` [PULL 19/23] block: do not check bdrv_file_open Paolo Bonzini
2024-06-22  6:15 ` [PULL 20/23] block: remove separate bdrv_file_open callback Paolo Bonzini
2024-06-22  6:15 ` [PULL 21/23] block: rename former bdrv_file_open callbacks Paolo Bonzini
2024-06-22  6:15 ` [PULL 22/23] exec: avoid using C++ keywords in function parameters Paolo Bonzini
2024-06-22  6:15 ` [PULL 23/23] exec: don't use void* in pointer arithmetic in headers Paolo Bonzini

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