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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>
Subject: [PULL 04/23] target/i386: give CC_OP_POPCNT low bits corresponding to MO_TL
Date: Sat, 22 Jun 2024 08:15:38 +0200	[thread overview]
Message-ID: <20240622061558.530543-5-pbonzini@redhat.com> (raw)
In-Reply-To: <20240622061558.530543-1-pbonzini@redhat.com>

Handle it like the other arithmetic cc_ops.  This simplifies a
bit the implementation of bit test instructions.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/cpu.h           | 13 +++++++++++--
 target/i386/tcg/translate.c |  3 +--
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index f54cd93b3f9..8504a7998fd 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1275,6 +1275,7 @@ typedef enum {
     CC_OP_ADCX, /* CC_DST = C, CC_SRC = rest.  */
     CC_OP_ADOX, /* CC_SRC2 = O, CC_SRC = rest.  */
     CC_OP_ADCOX, /* CC_DST = C, CC_SRC2 = O, CC_SRC = rest.  */
+    CC_OP_CLR, /* Z and P set, all other flags clear.  */
 
     CC_OP_MULB, /* modify all flags, C, O = (CC_SRC != 0) */
     CC_OP_MULW,
@@ -1331,8 +1332,16 @@ typedef enum {
     CC_OP_BMILGL,
     CC_OP_BMILGQ,
 
-    CC_OP_CLR, /* Z set, all other flags clear.  */
-    CC_OP_POPCNT, /* Z via CC_DST, all other flags clear.  */
+    /*
+     * Note that only CC_OP_POPCNT (i.e. the one with MO_TL size)
+     * is used or implemented, because the translation needs
+     * to zero-extend CC_DST anyway.
+     */
+    CC_OP_POPCNTB__, /* Z via CC_DST, all other flags clear.  */
+    CC_OP_POPCNTW__,
+    CC_OP_POPCNTL__,
+    CC_OP_POPCNTQ__,
+    CC_OP_POPCNT = sizeof(target_ulong) == 8 ? CC_OP_POPCNTQ__ : CC_OP_POPCNTL__,
 
     CC_OP_NB,
 } CCOp;
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index eb353dc3c9f..934c514e64f 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -1019,8 +1019,6 @@ static CCPrepare gen_prepare_eflags_z(DisasContext *s, TCGv reg)
                              .imm = CC_Z };
     case CC_OP_CLR:
         return (CCPrepare) { .cond = TCG_COND_ALWAYS };
-    case CC_OP_POPCNT:
-        return (CCPrepare) { .cond = TCG_COND_EQ, .reg = cpu_cc_dst };
     default:
         {
             MemOp size = (s->cc_op - CC_OP_ADDB) & 3;
@@ -3177,6 +3175,7 @@ static void disas_insn_old(DisasContext *s, CPUState *cpu, int b)
         case CC_OP_SHLB ... CC_OP_SHLQ:
         case CC_OP_SARB ... CC_OP_SARQ:
         case CC_OP_BMILGB ... CC_OP_BMILGQ:
+        case CC_OP_POPCNT:
             /* Z was going to be computed from the non-zero status of CC_DST.
                We can get that same Z value (and the new C value) by leaving
                CC_DST alone, setting CC_SRC, and using a CC_OP_SAR of the
-- 
2.45.2



  parent reply	other threads:[~2024-06-22  6:17 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-22  6:15 [PULL 00/23] Misc changes for 2024-06-22 Paolo Bonzini
2024-06-22  6:15 ` [PULL 01/23] configure: detect --cpu=mipsisa64r6 Paolo Bonzini
2024-06-22  6:15 ` [PULL 02/23] target/i386: fix CC_OP dump Paolo Bonzini
2024-06-22  6:15 ` [PULL 03/23] target/i386: use cpu_cc_dst for CC_OP_POPCNT Paolo Bonzini
2024-06-22  6:15 ` Paolo Bonzini [this message]
2024-06-22  6:15 ` [PULL 05/23] target/i386: convert bit test instructions to new decoder Paolo Bonzini
2024-06-22  6:15 ` [PULL 06/23] target/i386: try not to force EFLAGS computation for CC_OP_ADOX/ADCX Paolo Bonzini
2024-06-22  6:15 ` [PULL 07/23] target/i386: decode address before going back to translate.c Paolo Bonzini
2024-06-22  6:15 ` [PULL 08/23] target/i386: convert CMPXCHG8B/CMPXCHG16B to new decoder Paolo Bonzini
2024-06-22  6:15 ` [PULL 09/23] target/i386: do not check PREFIX_LOCK in old-style decoder Paolo Bonzini
2024-06-22  6:15 ` [PULL 10/23] target/i386: list instructions still in translate.c Paolo Bonzini
2024-06-22  6:15 ` [PULL 11/23] target/i386: assert that cc_op* and pc_save are preserved Paolo Bonzini
2024-06-22  6:15 ` [PULL 12/23] target/i386: remove gen_ext_tl Paolo Bonzini
2024-06-22  6:15 ` [PULL 13/23] Revert "host/i386: assume presence of POPCNT" Paolo Bonzini
2024-06-22  6:15 ` [PULL 14/23] Revert "host/i386: assume presence of SSSE3" Paolo Bonzini
2024-06-22  6:15 ` [PULL 15/23] Revert "host/i386: assume presence of SSE2" Paolo Bonzini
2024-06-22 16:55   ` Richard Henderson
2024-06-22  6:15 ` [PULL 16/23] meson: allow configuring the x86-64 baseline Paolo Bonzini
2024-06-22  6:15 ` [PULL 17/23] meson: remove dead optimization option Paolo Bonzini
2024-06-22  6:15 ` [PULL 18/23] block: make assertion more generic Paolo Bonzini
2024-06-22  6:15 ` [PULL 19/23] block: do not check bdrv_file_open Paolo Bonzini
2024-06-22  6:15 ` [PULL 20/23] block: remove separate bdrv_file_open callback Paolo Bonzini
2024-06-22  6:15 ` [PULL 21/23] block: rename former bdrv_file_open callbacks Paolo Bonzini
2024-06-22  6:15 ` [PULL 22/23] exec: avoid using C++ keywords in function parameters Paolo Bonzini
2024-06-22  6:15 ` [PULL 23/23] exec: don't use void* in pointer arithmetic in headers Paolo Bonzini

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