From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 16/18] hw/misc: Set valid access size for Exynos4210 RNG
Date: Sat, 22 Jun 2024 13:06:41 +0100 [thread overview]
Message-ID: <20240622120643.3797539-17-peter.maydell@linaro.org> (raw)
In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org>
From: Zheyu Ma <zheyuma97@gmail.com>
The Exynos4210 RNG module requires 32-bit (4-byte) accesses to its registers.
According to the User Manual Section 25.3[1], the registers for RNG operations
are 32-bit. This change ensures that the memory region operations for the
RNG module enforce the correct access sizes, preventing invalid memory accesses.
[1] http://www.mediafire.com/view/8ly2fqls3c9c31c/Exynos_4412_SCP_Users_Manual_Ver.0.10.00_Preliminary0.pdf
Reproducer:
cat << EOF | qemu-system-aarch64 -display none \
-machine accel=qtest, -m 512M -machine smdkc210 -qtest stdio
readb 0x10830454
EOF
Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Zheyu Ma <zheyuma97@gmail.com>
Message-id: 20240618163701.3204975-1-zheyuma97@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/misc/exynos4210_rng.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/misc/exynos4210_rng.c b/hw/misc/exynos4210_rng.c
index 0756bd32059..674d8eece5f 100644
--- a/hw/misc/exynos4210_rng.c
+++ b/hw/misc/exynos4210_rng.c
@@ -217,6 +217,8 @@ static const MemoryRegionOps exynos4210_rng_ops = {
.read = exynos4210_rng_read,
.write = exynos4210_rng_write,
.endianness = DEVICE_NATIVE_ENDIAN,
+ .valid.min_access_size = 4,
+ .valid.max_access_size = 4,
};
static void exynos4210_rng_reset(DeviceState *dev)
--
2.34.1
next prev parent reply other threads:[~2024-06-22 12:08 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-22 12:06 [PULL 00/18] target-arm queue Peter Maydell
2024-06-22 12:06 ` [PULL 01/18] hw/net/can/xlnx-versal-canfd: Fix sorting of the tx queue Peter Maydell
2024-06-22 12:06 ` [PULL 02/18] hw/arm/sbsa-ref: switch to 1GHz timer frequency Peter Maydell
2024-06-22 12:06 ` [PULL 03/18] hw/intc/arm_gic: Fix deactivation of SPI lines Peter Maydell
2024-06-22 12:06 ` [PULL 04/18] hw/arm/xilinx_zynq: Fix IRQ/FIQ routing Peter Maydell
2024-06-22 12:06 ` [PULL 05/18] scripts/coverity-scan/COMPONENTS.md: Update paths to match gitlab CI Peter Maydell
2024-06-22 12:06 ` [PULL 06/18] scripts/coverity-scan/COMPONENTS.md: Fix 'char' component Peter Maydell
2024-06-22 12:06 ` [PULL 07/18] scripts/coverity-scan/COMPONENTS.md: Add crypto headers in host/include to the crypto component Peter Maydell
2024-06-22 12:06 ` [PULL 08/18] scripts/coverity-scan/COMPONENTS.md: Fix monitor component Peter Maydell
2024-06-22 12:06 ` [PULL 09/18] scripts/coverity-scan/COMPONENTS.md: Include libqmp in testlibs Peter Maydell
2024-06-22 12:06 ` [PULL 10/18] hw/timer/a9gtimer: Handle QTest mode in a9_gtimer_get_current_cpu Peter Maydell
2024-06-22 12:06 ` [PULL 11/18] hw/usb/hcd-dwc2: Handle invalid address access in read and write functions Peter Maydell
2024-06-22 12:06 ` [PULL 12/18] hw/arm/virt: Add serial aliases in DTB Peter Maydell
2024-06-22 12:06 ` [PULL 13/18] hw/arm/virt: Rename VIRT_UART and VIRT_SECURE_UART to VIRT_UART[01] Peter Maydell
2024-06-22 12:06 ` [PULL 14/18] hw/arm/virt: allow creation of a second NonSecure UART Peter Maydell
2024-06-22 12:06 ` [PULL 15/18] hw/arm/virt: Avoid unexpected warning from Linux guest on host with Fujitsu CPUs Peter Maydell
2024-06-22 12:06 ` Peter Maydell [this message]
2024-06-22 12:06 ` [PULL 17/18] hw/usb/hcd-ohci: Fix ohci_service_td: accept zero-length TDs where CBP=BE+1 Peter Maydell
2024-06-22 12:06 ` [PULL 18/18] hw/arm/sbsa-ref: Enable CPU cluster on ARM sbsa machine Peter Maydell
2024-06-23 17:46 ` [PULL 00/18] target-arm queue Richard Henderson
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