* [PULL v2 00/23] Misc changes for 2024-06-22
@ 2024-06-24 13:59 Paolo Bonzini
2024-06-24 13:59 ` [PULL v2 15/23] Revert "host/i386: assume presence of SSE2" Paolo Bonzini
2024-06-24 18:56 ` [PULL v2 00/23] Misc changes for 2024-06-22 Richard Henderson
0 siblings, 2 replies; 3+ messages in thread
From: Paolo Bonzini @ 2024-06-24 13:59 UTC (permalink / raw)
To: qemu-devel
The following changes since commit c9ba79baca7c673098361e3a687f72d458e0d18a:
Merge tag 'pull-target-arm-20240622' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-06-22 09:56:49 -0700)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to fetch changes up to 0753fbb4750ad6709c43b4263c3d29b00f7cd0bb:
exec: don't use void* in pointer arithmetic in headers (2024-06-24 09:17:16 +0200)
----------------------------------------------------------------
* configure: detect --cpu=mipsisa64r6
* target/i386: decode address before going back to translate.c
* meson: allow configuring the x86-64 baseline
* meson: remove dead optimization option
* exec: small changes to allow compilation with C++ in Android emulator
----------------------------------------------------------------
Paolo Bonzini (21):
configure: detect --cpu=mipsisa64r6
target/i386: fix CC_OP dump
target/i386: use cpu_cc_dst for CC_OP_POPCNT
target/i386: give CC_OP_POPCNT low bits corresponding to MO_TL
target/i386: convert bit test instructions to new decoder
target/i386: try not to force EFLAGS computation for CC_OP_ADOX/ADCX
target/i386: decode address before going back to translate.c
target/i386: convert CMPXCHG8B/CMPXCHG16B to new decoder
target/i386: do not check PREFIX_LOCK in old-style decoder
target/i386: list instructions still in translate.c
target/i386: assert that cc_op* and pc_save are preserved
target/i386: remove gen_ext_tl
Revert "host/i386: assume presence of POPCNT"
Revert "host/i386: assume presence of SSSE3"
Revert "host/i386: assume presence of SSE2"
meson: allow configuring the x86-64 baseline
meson: remove dead optimization option
block: make assertion more generic
block: do not check bdrv_file_open
block: remove separate bdrv_file_open callback
block: rename former bdrv_file_open callbacks
Roman Kiryanov (2):
exec: avoid using C++ keywords in function parameters
exec: don't use void* in pointer arithmetic in headers
configure | 2 +-
meson.build | 54 ++--
host/include/i386/host/cpuinfo.h | 2 +
include/block/block_int-common.h | 3 -
include/exec/memory.h | 6 +-
target/i386/cpu.h | 13 +-
target/i386/tcg/decode-new.h | 19 +-
tcg/i386/tcg-target.h | 5 +-
block.c | 17 +-
block/blkdebug.c | 2 +-
block/blkio.c | 8 +-
block/blkverify.c | 2 +-
block/curl.c | 8 +-
block/file-posix.c | 8 +-
block/file-win32.c | 4 +-
block/gluster.c | 6 +-
block/iscsi.c | 4 +-
block/nbd.c | 6 +-
block/nfs.c | 2 +-
block/null.c | 8 +-
block/nvme.c | 8 +-
block/rbd.c | 3 +-
block/ssh.c | 6 +-
block/vvfat.c | 2 +-
target/i386/cpu-dump.c | 101 +++---
target/i386/tcg/cc_helper.c | 2 +-
target/i386/tcg/translate.c | 492 ++++++------------------------
util/cpuinfo-i386.c | 6 +-
host/include/i386/host/bufferiszero.c.inc | 5 +-
target/i386/tcg/decode-new.c.inc | 136 ++++++---
target/i386/tcg/emit.c.inc | 249 ++++++++++++++-
meson_options.txt | 5 +-
scripts/meson-buildoptions.sh | 6 +-
33 files changed, 619 insertions(+), 581 deletions(-)
--
2.45.2
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PULL v2 15/23] Revert "host/i386: assume presence of SSE2"
2024-06-24 13:59 [PULL v2 00/23] Misc changes for 2024-06-22 Paolo Bonzini
@ 2024-06-24 13:59 ` Paolo Bonzini
2024-06-24 18:56 ` [PULL v2 00/23] Misc changes for 2024-06-22 Richard Henderson
1 sibling, 0 replies; 3+ messages in thread
From: Paolo Bonzini @ 2024-06-24 13:59 UTC (permalink / raw)
To: qemu-devel
This reverts commit b18236897ca15c3db1506d8edb9a191dfe51429c.
The x86-64 instruction set can now be tuned down to x86-64 v1
or i386 Pentium Pro.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
host/include/i386/host/cpuinfo.h | 1 +
util/cpuinfo-i386.c | 1 +
host/include/i386/host/bufferiszero.c.inc | 5 +++--
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/host/include/i386/host/cpuinfo.h b/host/include/i386/host/cpuinfo.h
index 72f6fad61e5..81771733eaa 100644
--- a/host/include/i386/host/cpuinfo.h
+++ b/host/include/i386/host/cpuinfo.h
@@ -14,6 +14,7 @@
#define CPUINFO_POPCNT (1u << 4)
#define CPUINFO_BMI1 (1u << 5)
#define CPUINFO_BMI2 (1u << 6)
+#define CPUINFO_SSE2 (1u << 7)
#define CPUINFO_AVX1 (1u << 9)
#define CPUINFO_AVX2 (1u << 10)
#define CPUINFO_AVX512F (1u << 11)
diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c
index ca74ef04f54..90f92a42dc8 100644
--- a/util/cpuinfo-i386.c
+++ b/util/cpuinfo-i386.c
@@ -34,6 +34,7 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
if (max >= 1) {
__cpuid(1, a, b, c, d);
+ info |= (d & bit_SSE2 ? CPUINFO_SSE2 : 0);
info |= (c & bit_MOVBE ? CPUINFO_MOVBE : 0);
info |= (c & bit_POPCNT ? CPUINFO_POPCNT : 0);
info |= (c & bit_PCLMUL ? CPUINFO_PCLMUL : 0);
diff --git a/host/include/i386/host/bufferiszero.c.inc b/host/include/i386/host/bufferiszero.c.inc
index 3b9605d806f..74ae98580f6 100644
--- a/host/include/i386/host/bufferiszero.c.inc
+++ b/host/include/i386/host/bufferiszero.c.inc
@@ -110,13 +110,14 @@ static biz_accel_fn const accel_table[] = {
static unsigned best_accel(void)
{
-#ifdef CONFIG_AVX2_OPT
unsigned info = cpuinfo_init();
+
+#ifdef CONFIG_AVX2_OPT
if (info & CPUINFO_AVX2) {
return 2;
}
#endif
- return 1;
+ return info & CPUINFO_SSE2 ? 1 : 0;
}
#else
--
2.45.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PULL v2 00/23] Misc changes for 2024-06-22
2024-06-24 13:59 [PULL v2 00/23] Misc changes for 2024-06-22 Paolo Bonzini
2024-06-24 13:59 ` [PULL v2 15/23] Revert "host/i386: assume presence of SSE2" Paolo Bonzini
@ 2024-06-24 18:56 ` Richard Henderson
1 sibling, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2024-06-24 18:56 UTC (permalink / raw)
To: Paolo Bonzini, qemu-devel
On 6/24/24 06:59, Paolo Bonzini wrote:
> The following changes since commit c9ba79baca7c673098361e3a687f72d458e0d18a:
>
> Merge tag 'pull-target-arm-20240622' ofhttps://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-06-22 09:56:49 -0700)
>
> are available in the Git repository at:
>
> https://gitlab.com/bonzini/qemu.git tags/for-upstream
>
> for you to fetch changes up to 0753fbb4750ad6709c43b4263c3d29b00f7cd0bb:
>
> exec: don't use void* in pointer arithmetic in headers (2024-06-24 09:17:16 +0200)
>
> ----------------------------------------------------------------
> * configure: detect --cpu=mipsisa64r6
> * target/i386: decode address before going back to translate.c
> * meson: allow configuring the x86-64 baseline
> * meson: remove dead optimization option
> * exec: small changes to allow compilation with C++ in Android emulator
Fails testing:
https://gitlab.com/qemu-project/qemu/-/jobs/7174394076
https://gitlab.com/qemu-project/qemu/-/jobs/7174394063
https://gitlab.com/qemu-project/qemu/-/jobs/7174394088
r~
^ permalink raw reply [flat|nested] 3+ messages in thread
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2024-06-24 18:56 ` [PULL v2 00/23] Misc changes for 2024-06-22 Richard Henderson
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