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From: "Cédric Le Goater" <clg@redhat.com>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Joel Stanley" <joel@jms.id.au>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Jamin Lin" <jamin_lin@aspeedtech.com>,
	"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH] aspeed/sdmc: Check RAM size value at realize time
Date: Tue, 25 Jun 2024 08:58:39 +0200	[thread overview]
Message-ID: <20240625065839.485034-1-clg@redhat.com> (raw)

The RAM size of the SDMC device is validated for the SoC and set when
the Aspeed machines are initialized and then later used by several
SoC implementations. However, the SDMC model never checks that the RAM
size has been actually set before being used. Do that at realize.

Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
 hw/misc/aspeed_sdmc.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
index 94eed9264d09..ebf139cb5c91 100644
--- a/hw/misc/aspeed_sdmc.c
+++ b/hw/misc/aspeed_sdmc.c
@@ -271,6 +271,12 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error **errp)
     AspeedSDMCClass *asc = ASPEED_SDMC_GET_CLASS(s);
 
     assert(asc->max_ram_size < 4 * GiB || asc->is_bus64bit);
+
+    if (!s->ram_size) {
+        error_setg(errp, "RAM size is not set");
+        return;
+    }
+
     s->max_ram_size = asc->max_ram_size;
 
     memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_sdmc_ops, s,
-- 
2.45.2



             reply	other threads:[~2024-06-25  6:59 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-25  6:58 Cédric Le Goater [this message]
2024-06-25  7:24 ` [PATCH] aspeed/sdmc: Check RAM size value at realize time Jamin Lin
2024-07-02  5:57 ` Cédric Le Goater

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