From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: brad@comstyle.com, Alistair.Francis@wdc.com, palmer@dabbelt.com,
qemu-riscv@nongnu.org
Subject: [PATCH 3/3] util/cpuinfo-riscv: Use linux __riscv_hwprobe syscall
Date: Thu, 27 Jun 2024 11:03:50 -0700 [thread overview]
Message-ID: <20240627180350.128575-4-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240627180350.128575-1-richard.henderson@linaro.org>
With recent linux kernels, there is a syscall to probe for various
ISA extensions. These bits were phased in over several kernel
releases, so we still require checks for symbol availability.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
meson.build | 6 ++++++
util/cpuinfo-riscv.c | 26 ++++++++++++++++++++++++++
2 files changed, 32 insertions(+)
diff --git a/meson.build b/meson.build
index 97e00d6f59..58afd0125d 100644
--- a/meson.build
+++ b/meson.build
@@ -2837,6 +2837,12 @@ have_cpuid_h = cc.links('''
}''')
config_host_data.set('CONFIG_CPUID_H', have_cpuid_h)
+# Don't bother to advertise asm/hwprobe.h for old versions that do
+# not contain RISCV_HWPROBE_EXT_ZBA.
+config_host_data.set('CONFIG_ASM_HWPROBE_H',
+ cc.has_header_symbol('asm/hwprobe.h',
+ 'RISCV_HWPROBE_EXT_ZBA'))
+
config_host_data.set('CONFIG_AVX2_OPT', get_option('avx2') \
.require(have_cpuid_h, error_message: 'cpuid.h not available, cannot enable AVX2') \
.require(cc.links('''
diff --git a/util/cpuinfo-riscv.c b/util/cpuinfo-riscv.c
index abf799794f..cf59ce83a3 100644
--- a/util/cpuinfo-riscv.c
+++ b/util/cpuinfo-riscv.c
@@ -6,6 +6,11 @@
#include "qemu/osdep.h"
#include "host/cpuinfo.h"
+#ifdef CONFIG_ASM_HWPROBE_H
+#include <asm/hwprobe.h>
+#include <sys/syscall.h>
+#endif
+
unsigned cpuinfo;
static volatile sig_atomic_t got_sigill;
@@ -47,6 +52,27 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
#endif
left &= ~info;
+#ifdef CONFIG_ASM_HWPROBE_H
+ if (left) {
+ /*
+ * TODO: glibc 2.40 will introduce <sys/hwprobe.h>, which
+ * provides __riscv_hwprobe and __riscv_hwprobe_one,
+ * which is a slightly cleaner interface.
+ */
+ struct riscv_hwprobe pair = { .key = RISCV_HWPROBE_KEY_IMA_EXT_0 };
+ if (syscall(__NR_riscv_hwprobe, &pair, 1, 0, NULL, 0) == 0
+ && pair.key >= 0) {
+ info |= pair.value & RISCV_HWPROBE_EXT_ZBA ? CPUINFO_ZBA : 0;
+ info |= pair.value & RISCV_HWPROBE_EXT_ZBB ? CPUINFO_ZBB : 0;
+ left &= ~(CPUINFO_ZBA | CPUINFO_ZBB);
+#ifdef RISCV_HWPROBE_EXT_ZICOND
+ info |= pair.value & RISCV_HWPROBE_EXT_ZICOND ? CPUINFO_ZICOND : 0;
+ left &= ~CPUINFO_ZICOND;
+#endif
+ }
+ }
+#endif /* CONFIG_ASM_HWPROBE_H */
+
if (left) {
struct sigaction sa_old, sa_new;
--
2.34.1
next prev parent reply other threads:[~2024-06-27 18:05 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-27 18:03 [PATCH 0/3] util: Add cpuinfo support for riscv Richard Henderson
2024-06-27 18:03 ` [PATCH 1/3] util/cpuinfo-riscv: Support host/cpuinfo.h " Richard Henderson
2024-07-02 19:55 ` Philippe Mathieu-Daudé
2024-07-02 23:04 ` Richard Henderson
2024-07-03 7:32 ` Philippe Mathieu-Daudé
2024-07-02 22:17 ` Daniel Henrique Barboza
2024-07-02 23:56 ` Alistair Francis
2024-07-03 8:46 ` LIU Zhiwei
2024-06-27 18:03 ` [PATCH 2/3] util/cpuinfo-riscv: Support OpenBSD signal frame Richard Henderson
2024-07-02 19:58 ` Philippe Mathieu-Daudé
2024-07-02 22:16 ` Daniel Henrique Barboza
2024-07-02 23:56 ` Alistair Francis
2024-06-27 18:03 ` Richard Henderson [this message]
2024-07-02 22:15 ` [PATCH 3/3] util/cpuinfo-riscv: Use linux __riscv_hwprobe syscall Daniel Henrique Barboza
2024-07-02 23:08 ` Richard Henderson
2024-07-02 23:58 ` Alistair Francis
2024-07-02 16:26 ` [PATCH 0/3] util: Add cpuinfo support for riscv Richard Henderson
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