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From: Akihiko Odaki <akihiko.odaki@daynix.com>
To: "Peter Maydell" <peter.maydell@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org,
	 Akihiko Odaki <akihiko.odaki@daynix.com>
Subject: [PATCH v3 3/7] tests/tcg/aarch64: Fix test architecture specification
Date: Sat, 29 Jun 2024 17:56:29 +0900	[thread overview]
Message-ID: <20240629-tcg-v3-3-fa57918bdf09@daynix.com> (raw)
In-Reply-To: <20240629-tcg-v3-0-fa57918bdf09@daynix.com>

sme-smopa-2.c requires sme-i16i64 but the compiler option used not to
specify it. Instead, the extension was specified with the inline
assembly, resulting in mixing assembly code targeting sme-i1664 and C
code that does not target sme-i1664.

clang version 18.1.6 does not support such mixing so properly specify
the extension with the compiler option instead.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
---
 tests/tcg/aarch64/sme-smopa-2.c   |  2 +-
 tests/tcg/aarch64/Makefile.target | 18 ++++++++++++++----
 2 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/tests/tcg/aarch64/sme-smopa-2.c b/tests/tcg/aarch64/sme-smopa-2.c
index c9f48c3bfca2..2c9707065992 100644
--- a/tests/tcg/aarch64/sme-smopa-2.c
+++ b/tests/tcg/aarch64/sme-smopa-2.c
@@ -14,7 +14,7 @@ int main()
     long svl;
 
     /* Validate that we have a wide enough vector for 4 elements. */
-    asm(".arch armv8-r+sme-i64\n\trdsvl %0, #1" : "=r"(svl));
+    asm("rdsvl %0, #1" : "=r"(svl));
     if (svl < 32) {
         return 0;
     }
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index d3e739b566d9..0a527a9821c2 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -30,7 +30,8 @@ config-cc.mak: Makefile
 	    $(call cc-option,-march=armv8.5-a,              CROSS_CC_HAS_ARMV8_5); \
 	    $(call cc-option,-mbranch-protection=standard,  CROSS_CC_HAS_ARMV8_BTI); \
 	    $(call cc-option,-march=armv8.5-a+memtag,       CROSS_CC_HAS_ARMV8_MTE); \
-	    $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme $$fno_integrated_as, CROSS_AS_HAS_ARMV9_SME)) 3> config-cc.mak
+	    $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme $$fno_integrated_as, CROSS_AS_HAS_ARMV9_SME); \
+	    $(call cc-option,-march=armv9-a+sme-i16i64 $$fno_integrated_as,     CROSS_AS_HAS_ARMV9_SME_I1664)) 3> config-cc.mak
 -include config-cc.mak
 
 ifneq ($(CROSS_CC_HAS_ARMV8_2),)
@@ -71,10 +72,19 @@ endif
 
 # SME Tests
 ifneq ($(CROSS_AS_HAS_ARMV9_SME),)
-AARCH64_TESTS += sme-outprod1 sme-smopa-1 sme-smopa-2
-sme-%: CFLAGS += -Wa,-march=armv9-a+sme
+AARCH64_TESTS += sme-outprod1 sme-smopa-1
+sme-outprod1 sme-smopa-1: CFLAGS += -Wa,-march=armv9-a+sme
 ifneq ($(CROSS_CC_HAS_FNO_INTEGRATED_AS),)
-sme-%: CFLAGS += -fno-integrated-as
+sme-outprod1 sme-smopa-1: CFLAGS += -fno-integrated-as
+endif
+endif
+
+# SME I16I64 Tests
+ifneq ($(CROSS_AS_HAS_ARMV9_SME_I1664),)
+AARCH64_TESTS += sme-smopa-2
+sme-smopa-2: CFLAGS += -march=armv9-a+sme-i16i64
+ifneq ($(CROSS_CC_HAS_FNO_INTEGRATED_AS),)
+sme-smopa-2: CFLAGS += -fno-integrated-as
 endif
 endif
 

-- 
2.45.2



  parent reply	other threads:[~2024-06-29  8:58 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-29  8:56 [PATCH v3 0/7] tests/tcg/aarch64: Fix inline assemblies for clang Akihiko Odaki
2024-06-29  8:56 ` [PATCH v3 1/7] tests/tcg/aarch64: Use -fno-integrated-as Akihiko Odaki
2024-06-29  8:56 ` [PATCH v3 2/7] tests/tcg/aarch64: Specify -Wa,-march=armv9-a+sme Akihiko Odaki
2024-06-29  8:56 ` Akihiko Odaki [this message]
2024-06-29  8:56 ` [PATCH v3 4/7] tests/tcg/aarch64: Explicitly specify register width Akihiko Odaki
2024-06-29  8:56 ` [PATCH v3 5/7] tests/tcg/aarch64: Fix irg operand type Akihiko Odaki
2024-06-29  8:56 ` [PATCH v3 6/7] tests/tcg/aarch64: Do not use x constraint Akihiko Odaki
2024-06-29  8:56 ` [PATCH v3 7/7] tests/tcg/arm: Manually bit-cast half-precision numbers Akihiko Odaki
2024-06-29 16:21   ` Richard Henderson

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