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Tsirkin" To: "Chen, Jiqian" Cc: "qemu-devel@nongnu.org" , "Huang, Ray" , Eduardo Habkost , Marcel Apfelbaum Subject: Re: [PATCH v11 2/2] virtio-pci: implement No_Soft_Reset bit Message-ID: <20240702070728-mutt-send-email-mst@kernel.org> References: <20240606102205.114671-1-Jiqian.Chen@amd.com> <20240606102205.114671-3-Jiqian.Chen@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, Jul 02, 2024 at 02:36:14AM +0000, Chen, Jiqian wrote: > On 2024/6/21 17:20, Chen, Jiqian wrote: > > Hi MST, > > > > On 2024/6/6 18:22, Jiqian Chen wrote: > >> In current code, when guest does S3, virtio-gpu are reset due to the > >> bit No_Soft_Reset is not set. After resetting, the display resources > >> of virtio-gpu are destroyed, then the display can't come back and only > >> show blank after resuming. > >> > >> Implement No_Soft_Reset bit of PCI_PM_CTRL register, then guest can check > >> this bit, if this bit is set, the devices resetting will not be done, and > >> then the display can work after resuming. > >> > >> No_Soft_Reset bit is implemented for all virtio devices, and was tested > >> only on virtio-gpu device. Set it false by default for safety. > >> > >> Signed-off-by: Jiqian Chen > >> --- > >> hw/core/machine.c | 1 + > >> hw/virtio/virtio-pci.c | 29 +++++++++++++++++++++++++++++ > >> include/hw/virtio/virtio-pci.h | 5 +++++ > >> 3 files changed, 35 insertions(+) > >> > >> diff --git a/hw/core/machine.c b/hw/core/machine.c > >> index 77a356f232f5..b6af94edcd0a 100644 > >> --- a/hw/core/machine.c > >> +++ b/hw/core/machine.c > >> @@ -36,6 +36,7 @@ > >> GlobalProperty hw_compat_9_0[] = { > >> {"arm-cpu", "backcompat-cntfrq", "true" }, > >> {"vfio-pci", "skip-vsc-check", "false" }, > >> + { "virtio-pci", "x-pcie-pm-no-soft-reset", "off" }, > >> }; > >> const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0); > >> > >> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c > >> index 1b63bcb3f15c..c881f853253c 100644 > >> --- a/hw/virtio/virtio-pci.c > >> +++ b/hw/virtio/virtio-pci.c > >> @@ -2230,6 +2230,11 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) > >> pcie_cap_lnkctl_init(pci_dev); > >> } > >> > >> + if (proxy->flags & VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET) { > >> + pci_set_word(pci_dev->config + pos + PCI_PM_CTRL, > >> + PCI_PM_CTRL_NO_SOFT_RESET); > >> + } > >> + > >> if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { > >> /* Init Power Management Control Register */ > >> pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL, > >> @@ -2292,11 +2297,33 @@ static void virtio_pci_reset(DeviceState *qdev) > >> } > >> } > >> > >> +static bool virtio_pci_no_soft_reset(PCIDevice *dev) > >> +{ > >> + uint16_t pmcsr; > >> + > >> + if (!pci_is_express(dev) || !dev->exp.pm_cap) { > >> + return false; > >> + } > >> + > >> + pmcsr = pci_get_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL); > >> + > >> + /* > >> + * When No_Soft_Reset bit is set and the device > >> + * is in D3hot state, don't reset device > >> + */ > >> + return (pmcsr & PCI_PM_CTRL_NO_SOFT_RESET) && > >> + (pmcsr & PCI_PM_CTRL_STATE_MASK) == 3; > >> +} > >> + > >> static void virtio_pci_bus_reset_hold(Object *obj, ResetType type) > >> { > >> PCIDevice *dev = PCI_DEVICE(obj); > >> DeviceState *qdev = DEVICE(obj); > >> > >> + if (virtio_pci_no_soft_reset(dev)) { > >> + return; > >> + } > >> + > >> virtio_pci_reset(qdev); > >> > >> if (pci_is_express(dev)) { > >> @@ -2336,6 +2363,8 @@ static Property virtio_pci_properties[] = { > >> VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), > >> DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, > >> VIRTIO_PCI_FLAG_INIT_PM_BIT, true), > >> + DEFINE_PROP_BIT("x-pcie-pm-no-soft-reset", VirtIOPCIProxy, flags, > >> + VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT, false), > >> DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags, > >> VIRTIO_PCI_FLAG_INIT_FLR_BIT, true), > >> DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags, > >> diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h > >> index 59d88018c16a..9e67ba38c748 100644 > >> --- a/include/hw/virtio/virtio-pci.h > >> +++ b/include/hw/virtio/virtio-pci.h > >> @@ -43,6 +43,7 @@ enum { > >> VIRTIO_PCI_FLAG_INIT_FLR_BIT, > >> VIRTIO_PCI_FLAG_AER_BIT, > >> VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, > >> + VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT, > >> }; > >> > >> /* Need to activate work-arounds for buggy guests at vmstate load. */ > >> @@ -79,6 +80,10 @@ enum { > >> /* Init Power Management */ > >> #define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT) > >> > >> +/* Init The No_Soft_Reset bit of Power Management */ > >> +#define VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET \ > >> + (1 << VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT) > >> + > >> /* Init Function Level Reset capability */ > >> #define VIRTIO_PCI_FLAG_INIT_FLR (1 << VIRTIO_PCI_FLAG_INIT_FLR_BIT) > >> > > I have added compatibility for old machine. > > Do you have any other concerns about this patch? > > > If you don't have other concerns. May I get your Review-by? I'm testing this, and if ok will include it in the pull request. > -- > Best regards, > Jiqian Chen.