From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Alistair Francis" <alistair@alistair23.me>,
"Kevin Wolf" <kwolf@redhat.com>,
"Hanna Reitz" <hreitz@redhat.com>,
"Jason Wang" <jasowang@redhat.com>,
"Cleber Rosa" <crosa@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
"Beraldo Leal" <bleal@redhat.com>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:Block layer core" <qemu-block@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
<yunlin.tang@aspeedtech.com>
Subject: [PATCH v3 5/8] aspeed/soc: set dma64 property for AST2700 ftgmac100
Date: Thu, 4 Jul 2024 16:29:19 +0800 [thread overview]
Message-ID: <20240704082922.1464317-6-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20240704082922.1464317-1-jamin_lin@aspeedtech.com>
ASPEED AST2700 SOC is a 64 bits quad core CPUs (Cortex-a35)
And the base address of dram is "0x4 00000000" which
is 64bits address.
Set dma64 property for ftgmac100 model to support
64bits dram address DMA.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index 18e6a8b10c..a9fb0d4b88 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -552,9 +552,12 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
return;
}
+ /* Net */
for (i = 0; i < sc->macs_num; i++) {
object_property_set_bool(OBJECT(&s->ftgmac100[i]), "aspeed", true,
&error_abort);
+ object_property_set_bool(OBJECT(&s->ftgmac100[i]), "dma64", true,
+ &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ftgmac100[i]), errp)) {
return;
}
--
2.34.1
next prev parent reply other threads:[~2024-07-04 8:32 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-04 8:29 [PATCH v3 0/8] support AST2700 network Jamin Lin via
2024-07-04 8:29 ` [PATCH v3 1/8] hw/net:ftgmac100: update memory region size to 64KB Jamin Lin via
2024-07-04 8:53 ` Cédric Le Goater
2024-07-04 8:29 ` [PATCH v3 2/8] hw/net:ftgmac100: update ring base address to 64 bits Jamin Lin via
2024-07-04 9:08 ` Cédric Le Goater
2024-07-04 8:29 ` [PATCH v3 3/8] hw/net:ftgmac100: introduce TX and RX ring base address high registers to support " Jamin Lin via
2024-07-04 8:54 ` Cédric Le Goater
2024-07-04 8:29 ` [PATCH v3 4/8] hw/net:ftgmac100: update TX and RX packet buffers address to " Jamin Lin via
2024-07-04 9:19 ` Cédric Le Goater
2024-07-04 8:29 ` Jamin Lin via [this message]
2024-07-04 8:54 ` [PATCH v3 5/8] aspeed/soc: set dma64 property for AST2700 ftgmac100 Cédric Le Goater
2024-07-04 8:29 ` [PATCH v3 6/8] hw/block: m25p80: support quad mode for w25q01jvq Jamin Lin via
2024-07-04 8:29 ` [PATCH v3 7/8] machine_aspeed.py: update to test ASPEED OpenBMC SDK v09.02 for AST2700 Jamin Lin via
2024-07-04 8:54 ` Cédric Le Goater
2024-07-04 8:29 ` [PATCH v3 8/8] machine_aspeed.py: update to test network " Jamin Lin via
2024-07-04 8:54 ` Cédric Le Goater
2024-07-09 9:52 ` [PATCH v3 0/8] support AST2700 network Cédric Le Goater
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