From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: "Ho-Ren (Jack) Chuang" <horen.chuang@linux.dev>
Cc: "Huang, Ying" <ying.huang@intel.com>,
Gregory Price <gourry.memverge@gmail.com>,
<aneesh.kumar@linux.ibm.com>, <mhocko@suse.com>, <tj@kernel.org>,
<john@jagalactic.com>, Eishan Mirakhur <emirakhur@micron.com>,
Vinicius Tavares Petrucci <vtavarespetr@micron.com>,
Ravis OpenSrc <Ravis.OpenSrc@micron.com>,
Alistair Popple <apopple@nvidia.com>,
Srinivasulu Thanneeru <sthanneeru@micron.com>,
SeongJae Park <sj@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
Dave Jiang <dave.jiang@intel.com>,
"Dan Williams" <dan.j.williams@intel.com>,
<linux-acpi@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-mm@kvack.org>, "Ho-Ren (Jack) Chuang" <horenc@vt.edu>,
"Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com>,
"Ho-Ren (Jack) Chuang" <horenchuang@gmail.com>,
<linux-cxl@vger.kernel.org>, <qemu-devel@nongnu.org>
Subject: Re: [PATCH v3] memory tier: consolidate the initialization of memory tiers
Date: Thu, 4 Jul 2024 18:10:54 +0100 [thread overview]
Message-ID: <20240704181054.00001f67@Huawei.com> (raw)
In-Reply-To: <20240704072646.437579-1-horen.chuang@linux.dev>
On Thu, 4 Jul 2024 07:26:44 +0000
"Ho-Ren (Jack) Chuang" <horen.chuang@linux.dev> wrote:
> The current memory tier initialization process is distributed across
> two different functions, memory_tier_init() and memory_tier_late_init().
> This design is hard to maintain. Thus, this patch is proposed to reduce
> the possible code paths by consolidating different
> initialization patches into one.
>
> The earlier discussion with Jonathan and Ying is listed here:
> https://lore.kernel.org/lkml/20240405150244.00004b49@Huawei.com/
>
> If we want to put these two initializations together, they must be
> placed together in the later function. Because only at that time,
> the HMAT information will be ready, adist between nodes can be
> calculated, and memory tiering can be established based on the adist.
> So we position the initialization at memory_tier_init() to the
> memory_tier_late_init() call. Moreover, it's natural to keep
> memory_tier initialization in drivers at device_initcall() level.
>
> If we simply move the set_node_memory_tier() from memory_tier_init()
> to late_initcall(), it will result in HMAT not registering
> the mt_adistance_algorithm callback function, because
> set_node_memory_tier() is not performed during the memory tiering
> initialization phase, leading to a lack of correct default_dram
> information.
>
> Therefore, we introduced a nodemask to pass the information of the
> default DRAM nodes. The reason for not choosing to reuse
> default_dram_type->nodes is that it is not clean enough. So in the end,
> we use a __initdata variable, which is a variable that is released once
> initialization is complete, including both CPU and memory nodes for HMAT
> to iterate through.
>
> This patchset is based on commits <cf93be18fa1b> ("memory tier: create
> CPUless memory tiers after obtaining HMAT info") and
> <a72a30af550c> ("memory tier: dax/kmem: introduce an abstract layer for
> finding, allocating, and putting memory types"):
> [0/2] https://lkml.kernel.org/r/20240405000707.2670063-1-horenchuang@bytedance.com
> [1/2] https://lkml.kernel.org/r/20240405000707.2670063-2-horenchuang@bytedance.com
> [1/2] https://lkml.kernel.org/r/20240405000707.2670063-3-horenchuang@bytedance.com
>
> Signed-off-by: Ho-Ren (Jack) Chuang <horenchuang@bytedance.com>
> Suggested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
LGTM
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
prev parent reply other threads:[~2024-07-04 17:11 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-04 7:26 [PATCH v3] memory tier: consolidate the initialization of memory tiers Ho-Ren (Jack) Chuang
2024-07-04 7:55 ` Huang, Ying
2024-07-04 17:10 ` Jonathan Cameron via [this message]
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