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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4264a1d6d22sm99063165e9.20.2024.07.06.07.58.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Jul 2024 07:58:02 -0700 (PDT) Date: Sat, 6 Jul 2024 16:58:02 +0200 From: Igor Mammedov To: Xiaoyao Li Cc: Paolo Bonzini , qemu-devel@nongnu.org Subject: Re: [PATCH] i386/cpu: Drop the check of phys_bits in host_cpu_realizefn() Message-ID: <20240706165802.49ec3fd8@imammedo.users.ipa.redhat.com> In-Reply-To: <20240704111231.2881016-1-xiaoyao.li@intel.com> References: <20240704111231.2881016-1-xiaoyao.li@intel.com> X-Mailer: Claws Mail 4.2.0 (GTK 3.24.42; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Thu, 4 Jul 2024 07:12:31 -0400 Xiaoyao Li wrote: > The check of cpu->phys_bits to be in range between > [32, TARGET_PHYS_ADDR_SPACE_BITS] in host_cpu_realizefn() > is duplicated with check in x86_cpu_realizefn(). > > Since the ckeck in x86_cpu_realizefn() is called later and can cover all > teh x86 case. Remove the one in host_cpu_realizefn(). > > Signed-off-by: Xiaoyao Li Reviewed-by: Igor Mammedov > --- > target/i386/host-cpu.c | 12 +----------- > 1 file changed, 1 insertion(+), 11 deletions(-) > > diff --git a/target/i386/host-cpu.c b/target/i386/host-cpu.c > index 8b8bf5afeccf..b109c1a2221f 100644 > --- a/target/i386/host-cpu.c > +++ b/target/i386/host-cpu.c > @@ -75,17 +75,7 @@ bool host_cpu_realizefn(CPUState *cs, Error **errp) > CPUX86State *env = &cpu->env; > > if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) { > - uint32_t phys_bits = host_cpu_adjust_phys_bits(cpu); > - > - if (phys_bits && > - (phys_bits > TARGET_PHYS_ADDR_SPACE_BITS || > - phys_bits < 32)) { > - error_setg(errp, "phys-bits should be between 32 and %u " > - " (but is %u)", > - TARGET_PHYS_ADDR_SPACE_BITS, phys_bits); > - return false; > - } > - cpu->phys_bits = phys_bits; > + cpu->phys_bits = host_cpu_adjust_phys_bits(cpu); > } > return true; > }