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From: "Cédric Le Goater" <clg@redhat.com>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Jamin Lin" <jamin_lin@aspeedtech.com>,
	"Cédric Le Goater" <clg@redhat.com>
Subject: [PULL 1/8] hw/net:ftgmac100: update memory region size to 64KB
Date: Tue,  9 Jul 2024 13:52:21 +0200	[thread overview]
Message-ID: <20240709115228.798904-2-clg@redhat.com> (raw)
In-Reply-To: <20240709115228.798904-1-clg@redhat.com>

From: Jamin Lin <jamin_lin@aspeedtech.com>

According to the datasheet of ASPEED SOCs,
one MAC controller owns 128KB of register space for AST2500.
However, one MAC controller only owns 64KB of register space for AST2600
and AST2700. It set the memory region size 128KB and it occupied another
controllers Address Spaces.

Update one MAC controller memory region size to 0x1000
because AST2500 did not use register spaces over than 64KB.

Introduce a new container region size to 0x1000 and its range
is from 0 to 0xfff. This container is mapped a sub region
for the current set of register.
This sub region range is from 0 to 0xff.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
 include/hw/net/ftgmac100.h |  4 ++++
 hw/net/ftgmac100.c         | 11 ++++++++---
 2 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/include/hw/net/ftgmac100.h b/include/hw/net/ftgmac100.h
index 765d1538a49f..269446e85838 100644
--- a/include/hw/net/ftgmac100.h
+++ b/include/hw/net/ftgmac100.h
@@ -14,6 +14,9 @@
 #define TYPE_FTGMAC100 "ftgmac100"
 OBJECT_DECLARE_SIMPLE_TYPE(FTGMAC100State, FTGMAC100)
 
+#define FTGMAC100_MEM_SIZE 0x1000
+#define FTGMAC100_REG_MEM_SIZE 0x100
+
 #include "hw/sysbus.h"
 #include "net/net.h"
 
@@ -30,6 +33,7 @@ struct FTGMAC100State {
     NICState *nic;
     NICConf conf;
     qemu_irq irq;
+    MemoryRegion iomem_container;
     MemoryRegion iomem;
 
     uint8_t frame[FTGMAC100_MAX_FRAME_SIZE];
diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c
index 25e4c0cd5bfe..9e1f12cd331b 100644
--- a/hw/net/ftgmac100.c
+++ b/hw/net/ftgmac100.c
@@ -1107,9 +1107,14 @@ static void ftgmac100_realize(DeviceState *dev, Error **errp)
         s->rxdes0_edorr = FTGMAC100_RXDES0_EDORR;
     }
 
-    memory_region_init_io(&s->iomem, OBJECT(dev), &ftgmac100_ops, s,
-                          TYPE_FTGMAC100, 0x2000);
-    sysbus_init_mmio(sbd, &s->iomem);
+    memory_region_init(&s->iomem_container, OBJECT(s),
+                       TYPE_FTGMAC100 ".container", FTGMAC100_MEM_SIZE);
+    sysbus_init_mmio(sbd, &s->iomem_container);
+
+    memory_region_init_io(&s->iomem, OBJECT(s), &ftgmac100_ops, s,
+                          TYPE_FTGMAC100 ".regs", FTGMAC100_REG_MEM_SIZE);
+    memory_region_add_subregion(&s->iomem_container, 0x0, &s->iomem);
+
     sysbus_init_irq(sbd, &s->irq);
     qemu_macaddr_default_if_unset(&s->conf.macaddr);
 
-- 
2.45.2



  reply	other threads:[~2024-07-09 11:52 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-09 11:52 [PULL 0/8] aspeed queue Cédric Le Goater
2024-07-09 11:52 ` Cédric Le Goater [this message]
2024-07-09 11:52 ` [PULL 2/8] hw/net:ftgmac100: update ring base address to 64 bits Cédric Le Goater
2024-07-09 11:52 ` [PULL 3/8] hw/net:ftgmac100: introduce TX and RX ring base address high registers to support " Cédric Le Goater
2024-07-09 11:52 ` [PULL 4/8] hw/net:ftgmac100: update TX and RX packet buffers address to " Cédric Le Goater
2024-07-09 11:52 ` [PULL 5/8] aspeed/soc: set dma64 property for AST2700 ftgmac100 Cédric Le Goater
2024-07-09 11:52 ` [PULL 6/8] hw/block: m25p80: support quad mode for w25q01jvq Cédric Le Goater
2024-07-09 11:52 ` [PULL 7/8] machine_aspeed.py: update to test ASPEED OpenBMC SDK v09.02 for AST2700 Cédric Le Goater
2024-07-09 11:52 ` [PULL 8/8] machine_aspeed.py: update to test network " Cédric Le Goater
2024-07-09 17:26 ` [PULL 0/8] aspeed queue Richard Henderson

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