qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Mostafa Saleh <smostafa@google.com>
To: qemu-arm@nongnu.org, eric.auger@redhat.com,
	peter.maydell@linaro.org,  qemu-devel@nongnu.org
Cc: jean-philippe@linaro.org, alex.bennee@linaro.org, maz@kernel.org,
	 nicolinc@nvidia.com, julien@xen.org,
	richard.henderson@linaro.org,  marcin.juszkiewicz@linaro.org,
	Mostafa Saleh <smostafa@google.com>
Subject: [PATCH v5 16/18] hw/arm/smmuv3: Handle translation faults according to SMMUPTWEventInfo
Date: Mon, 15 Jul 2024 08:45:16 +0000	[thread overview]
Message-ID: <20240715084519.1189624-17-smostafa@google.com> (raw)
In-Reply-To: <20240715084519.1189624-1-smostafa@google.com>

Previously, to check if faults are enabled, it was sufficient to check
the current stage of translation and check the corresponding
record_faults flag.

However, with nesting, it is possible for stage-1 (nested) translation
to trigger a stage-2 fault, so we check SMMUPTWEventInfo as it would
have the correct stage set from the page table walk.

Signed-off-by: Mostafa Saleh <smostafa@google.com>
---
 hw/arm/smmuv3.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 84cd314b33..d052a2ba24 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -34,9 +34,10 @@
 #include "smmuv3-internal.h"
 #include "smmu-internal.h"
 
-#define PTW_RECORD_FAULT(cfg)   (((cfg)->stage == SMMU_STAGE_1) ? \
-                                 (cfg)->record_faults : \
-                                 (cfg)->s2cfg.record_faults)
+#define PTW_RECORD_FAULT(ptw_info, cfg) (((ptw_info).stage == SMMU_STAGE_1 && \
+                                        (cfg)->record_faults) || \
+                                        ((ptw_info).stage == SMMU_STAGE_2 && \
+                                        (cfg)->s2cfg.record_faults))
 
 /**
  * smmuv3_trigger_irq - pulse @irq if enabled and update
@@ -933,7 +934,7 @@ static SMMUTranslationStatus smmuv3_do_translate(SMMUv3State *s, hwaddr addr,
             event->u.f_walk_eabt.addr2 = ptw_info.addr;
             break;
         case SMMU_PTW_ERR_TRANSLATION:
-            if (PTW_RECORD_FAULT(cfg)) {
+            if (PTW_RECORD_FAULT(ptw_info, cfg)) {
                 event->type = SMMU_EVT_F_TRANSLATION;
                 event->u.f_translation.addr2 = ptw_info.addr;
                 event->u.f_translation.class = class;
@@ -941,7 +942,7 @@ static SMMUTranslationStatus smmuv3_do_translate(SMMUv3State *s, hwaddr addr,
             }
             break;
         case SMMU_PTW_ERR_ADDR_SIZE:
-            if (PTW_RECORD_FAULT(cfg)) {
+            if (PTW_RECORD_FAULT(ptw_info, cfg)) {
                 event->type = SMMU_EVT_F_ADDR_SIZE;
                 event->u.f_addr_size.addr2 = ptw_info.addr;
                 event->u.f_addr_size.class = class;
@@ -949,7 +950,7 @@ static SMMUTranslationStatus smmuv3_do_translate(SMMUv3State *s, hwaddr addr,
             }
             break;
         case SMMU_PTW_ERR_ACCESS:
-            if (PTW_RECORD_FAULT(cfg)) {
+            if (PTW_RECORD_FAULT(ptw_info, cfg)) {
                 event->type = SMMU_EVT_F_ACCESS;
                 event->u.f_access.addr2 = ptw_info.addr;
                 event->u.f_access.class = class;
@@ -957,7 +958,7 @@ static SMMUTranslationStatus smmuv3_do_translate(SMMUv3State *s, hwaddr addr,
             }
             break;
         case SMMU_PTW_ERR_PERMISSION:
-            if (PTW_RECORD_FAULT(cfg)) {
+            if (PTW_RECORD_FAULT(ptw_info, cfg)) {
                 event->type = SMMU_EVT_F_PERMISSION;
                 event->u.f_permission.addr2 = ptw_info.addr;
                 event->u.f_permission.class = class;
-- 
2.45.2.993.g49e7a77208-goog



  parent reply	other threads:[~2024-07-15  8:48 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-15  8:45 [PATCH v5 00/18] SMMUv3 nested translation support Mostafa Saleh
2024-07-15  8:45 ` [PATCH v5 01/18] hw/arm/smmu-common: Add missing size check for stage-1 Mostafa Saleh
2024-07-15  8:45 ` [PATCH v5 02/18] hw/arm/smmu: Fix IPA for stage-2 events Mostafa Saleh
2024-07-15  8:45 ` [PATCH v5 03/18] hw/arm/smmuv3: Fix encoding of CLASS in events Mostafa Saleh
2024-07-17 15:07   ` Eric Auger
2024-07-17 15:58     ` Jean-Philippe Brucker
2024-07-17 15:59       ` Eric Auger
2024-07-15  8:45 ` [PATCH v5 04/18] hw/arm/smmu: Use enum for SMMU stage Mostafa Saleh
2024-07-15  8:45 ` [PATCH v5 05/18] hw/arm/smmu: Split smmuv3_translate() Mostafa Saleh
2024-07-15  8:45 ` [PATCH v5 06/18] hw/arm/smmu: Consolidate ASID and VMID types Mostafa Saleh
2024-07-15  8:45 ` [PATCH v5 07/18] hw/arm/smmu: Introduce CACHED_ENTRY_TO_ADDR Mostafa Saleh
2024-07-15  8:45 ` [PATCH v5 08/18] hw/arm/smmuv3: Translate CD and TT using stage-2 table Mostafa Saleh
2024-07-17 15:18   ` Eric Auger
2024-07-15  8:45 ` [PATCH v5 09/18] hw/arm/smmu-common: Rework TLB lookup for nesting Mostafa Saleh
2024-07-17 15:28   ` Eric Auger
2024-07-15  8:45 ` [PATCH v5 10/18] hw/arm/smmu-common: Add support for nested TLB Mostafa Saleh
2024-07-15  8:45 ` [PATCH v5 11/18] hw/arm/smmu-common: Support nested translation Mostafa Saleh
2024-07-17 15:28   ` Eric Auger
2024-07-15  8:45 ` [PATCH v5 12/18] hw/arm/smmu: Support nesting in smmuv3_range_inval() Mostafa Saleh
2024-07-15  8:45 ` [PATCH v5 13/18] hw/arm/smmu: Introduce smmu_iotlb_inv_asid_vmid Mostafa Saleh
2024-07-15  8:45 ` [PATCH v5 14/18] hw/arm/smmu: Support nesting in the rest of commands Mostafa Saleh
2024-07-15  8:45 ` [PATCH v5 15/18] hw/arm/smmuv3: Support nested SMMUs in smmuv3_notify_iova() Mostafa Saleh
2024-07-17 15:30   ` Eric Auger
2024-07-15  8:45 ` Mostafa Saleh [this message]
2024-07-17 15:31   ` [PATCH v5 16/18] hw/arm/smmuv3: Handle translation faults according to SMMUPTWEventInfo Eric Auger
2024-07-15  8:45 ` [PATCH v5 17/18] hw/arm/smmuv3: Support and advertise nesting Mostafa Saleh
2024-07-15  8:45 ` [PATCH v5 18/18] hw/arm/smmu: Refactor SMMU OAS Mostafa Saleh
2024-07-17 15:09 ` [PATCH v5 00/18] SMMUv3 nested translation support Jean-Philippe Brucker
2024-07-17 17:43   ` Eric Auger
2024-07-17 19:06     ` Peter Maydell
2024-07-18  9:43     ` Julien Grall
2024-07-19 15:36       ` Julien Grall
2024-07-19 15:57         ` Peter Maydell
2024-07-20 22:11           ` Mostafa Saleh
2024-07-22  9:35             ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240715084519.1189624-17-smostafa@google.com \
    --to=smostafa@google.com \
    --cc=alex.bennee@linaro.org \
    --cc=eric.auger@redhat.com \
    --cc=jean-philippe@linaro.org \
    --cc=julien@xen.org \
    --cc=marcin.juszkiewicz@linaro.org \
    --cc=maz@kernel.org \
    --cc=nicolinc@nvidia.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).