* [PATCH v3 01/17] hw/intc/loongson_ipi: Access memory in little endian
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
@ 2024-07-17 21:46 ` Philippe Mathieu-Daudé
2024-07-17 21:46 ` [PATCH v3 02/17] hw/intc/loongson_ipi: Rename LoongsonIPI -> LoongsonIPIState Philippe Mathieu-Daudé
` (15 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:46 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
Loongson IPI is only available in little-endian,
so use that to access the guest memory (in case
we run on a big-endian host).
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Fixes: f6783e3438 ("hw/loongarch: Add LoongArch ipi interrupt support")
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/intc/loongson_ipi.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index e6a7142480..e7979dbdd8 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -14,6 +14,7 @@
#include "qapi/error.h"
#include "qemu/log.h"
#include "exec/address-spaces.h"
+#include "exec/memory.h"
#include "migration/vmstate.h"
#ifdef TARGET_LOONGARCH64
#include "target/loongarch/cpu.h"
@@ -102,7 +103,7 @@ static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr,
* if the mask is 0, we need not to do anything.
*/
if ((val >> 27) & 0xf) {
- data = address_space_ldl(iocsr_as, addr, attrs, NULL);
+ data = address_space_ldl_le(iocsr_as, addr, attrs, NULL);
for (i = 0; i < 4; i++) {
/* get mask for byte writing */
if (val & (0x1 << (27 + i))) {
@@ -113,7 +114,7 @@ static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr,
data &= mask;
data |= (val >> 32) & ~mask;
- address_space_stl(iocsr_as, addr, data, attrs, NULL);
+ address_space_stl_le(iocsr_as, addr, data, attrs, NULL);
return MEMTX_OK;
}
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 02/17] hw/intc/loongson_ipi: Rename LoongsonIPI -> LoongsonIPIState
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
2024-07-17 21:46 ` [PATCH v3 01/17] hw/intc/loongson_ipi: Access memory in little endian Philippe Mathieu-Daudé
@ 2024-07-17 21:46 ` Philippe Mathieu-Daudé
2024-07-17 21:46 ` [PATCH v3 03/17] hw/intc/loongson_ipi: Extract loongson_ipi_common_finalize() Philippe Mathieu-Daudé
` (14 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:46 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
We'll have to add LoongsonIPIClass in few commits,
so rename LoongsonIPI as LoongsonIPIState for clarity.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/intc/loongson_ipi.h | 6 +++---
hw/intc/loongson_ipi.c | 16 ++++++++--------
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h
index 3f795edbf3..efb772f384 100644
--- a/include/hw/intc/loongson_ipi.h
+++ b/include/hw/intc/loongson_ipi.h
@@ -31,10 +31,10 @@
#define IPI_MBX_NUM 4
#define TYPE_LOONGSON_IPI "loongson_ipi"
-OBJECT_DECLARE_SIMPLE_TYPE(LoongsonIPI, LOONGSON_IPI)
+OBJECT_DECLARE_SIMPLE_TYPE(LoongsonIPIState, LOONGSON_IPI)
typedef struct IPICore {
- LoongsonIPI *ipi;
+ LoongsonIPIState *ipi;
MemoryRegion *ipi_mmio_mem;
uint32_t status;
uint32_t en;
@@ -45,7 +45,7 @@ typedef struct IPICore {
qemu_irq irq;
} IPICore;
-struct LoongsonIPI {
+struct LoongsonIPIState {
SysBusDevice parent_obj;
MemoryRegion ipi_iocsr_mem;
MemoryRegion ipi64_iocsr_mem;
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index e7979dbdd8..a34e7e634f 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -64,7 +64,7 @@ static MemTxResult loongson_ipi_iocsr_readl(void *opaque, hwaddr addr,
uint64_t *data,
unsigned size, MemTxAttrs attrs)
{
- LoongsonIPI *ipi = opaque;
+ LoongsonIPIState *ipi = opaque;
IPICore *s;
if (attrs.requester_id >= ipi->num_cpu) {
@@ -160,7 +160,7 @@ static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr,
MemTxAttrs attrs)
{
IPICore *s = opaque;
- LoongsonIPI *ipi = s->ipi;
+ LoongsonIPIState *ipi = s->ipi;
int index = 0;
uint32_t cpuid;
uint8_t vector;
@@ -214,7 +214,7 @@ static MemTxResult loongson_ipi_iocsr_writel(void *opaque, hwaddr addr,
uint64_t val, unsigned size,
MemTxAttrs attrs)
{
- LoongsonIPI *ipi = opaque;
+ LoongsonIPIState *ipi = opaque;
IPICore *s;
if (attrs.requester_id >= ipi->num_cpu) {
@@ -277,7 +277,7 @@ static const MemoryRegionOps loongson_ipi64_ops = {
static void loongson_ipi_realize(DeviceState *dev, Error **errp)
{
- LoongsonIPI *s = LOONGSON_IPI(dev);
+ LoongsonIPIState *s = LOONGSON_IPI(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
int i;
@@ -337,14 +337,14 @@ static const VMStateDescription vmstate_loongson_ipi = {
.version_id = 2,
.minimum_version_id = 2,
.fields = (const VMStateField[]) {
- VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongsonIPI, num_cpu,
+ VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongsonIPIState, num_cpu,
vmstate_ipi_core, IPICore),
VMSTATE_END_OF_LIST()
}
};
static Property ipi_properties[] = {
- DEFINE_PROP_UINT32("num-cpu", LoongsonIPI, num_cpu, 1),
+ DEFINE_PROP_UINT32("num-cpu", LoongsonIPIState, num_cpu, 1),
DEFINE_PROP_END_OF_LIST(),
};
@@ -359,7 +359,7 @@ static void loongson_ipi_class_init(ObjectClass *klass, void *data)
static void loongson_ipi_finalize(Object *obj)
{
- LoongsonIPI *s = LOONGSON_IPI(obj);
+ LoongsonIPIState *s = LOONGSON_IPI(obj);
g_free(s->cpu);
}
@@ -367,7 +367,7 @@ static void loongson_ipi_finalize(Object *obj)
static const TypeInfo loongson_ipi_info = {
.name = TYPE_LOONGSON_IPI,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(LoongsonIPI),
+ .instance_size = sizeof(LoongsonIPIState),
.class_init = loongson_ipi_class_init,
.instance_finalize = loongson_ipi_finalize,
};
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 03/17] hw/intc/loongson_ipi: Extract loongson_ipi_common_finalize()
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
2024-07-17 21:46 ` [PATCH v3 01/17] hw/intc/loongson_ipi: Access memory in little endian Philippe Mathieu-Daudé
2024-07-17 21:46 ` [PATCH v3 02/17] hw/intc/loongson_ipi: Rename LoongsonIPI -> LoongsonIPIState Philippe Mathieu-Daudé
@ 2024-07-17 21:46 ` Philippe Mathieu-Daudé
2024-07-17 21:46 ` [PATCH v3 04/17] hw/intc/loongson_ipi: Extract loongson_ipi_common_realize() Philippe Mathieu-Daudé
` (13 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:46 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
In preparation to extract common IPI code in few commits,
extract loongson_ipi_common_finalize().
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/intc/loongson_ipi.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index a34e7e634f..3b3481c43e 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -357,13 +357,18 @@ static void loongson_ipi_class_init(ObjectClass *klass, void *data)
dc->vmsd = &vmstate_loongson_ipi;
}
-static void loongson_ipi_finalize(Object *obj)
+static void loongson_ipi_common_finalize(Object *obj)
{
LoongsonIPIState *s = LOONGSON_IPI(obj);
g_free(s->cpu);
}
+static void loongson_ipi_finalize(Object *obj)
+{
+ loongson_ipi_common_finalize(obj);
+}
+
static const TypeInfo loongson_ipi_info = {
.name = TYPE_LOONGSON_IPI,
.parent = TYPE_SYS_BUS_DEVICE,
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 04/17] hw/intc/loongson_ipi: Extract loongson_ipi_common_realize()
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2024-07-17 21:46 ` [PATCH v3 03/17] hw/intc/loongson_ipi: Extract loongson_ipi_common_finalize() Philippe Mathieu-Daudé
@ 2024-07-17 21:46 ` Philippe Mathieu-Daudé
2024-07-18 2:11 ` maobibo
2024-07-17 21:46 ` [PATCH v3 05/17] hw/intc/loongson_ipi: Add TYPE_LOONGSON_IPI_COMMON stub Philippe Mathieu-Daudé
` (12 subsequent siblings)
16 siblings, 1 reply; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:46 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
In preparation to extract common IPI code in few commits,
extract loongson_ipi_common_realize().
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/intc/loongson_ipi.c | 25 ++++++++++++++++++-------
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index 3b3481c43e..40ac769aad 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -275,7 +275,7 @@ static const MemoryRegionOps loongson_ipi64_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
-static void loongson_ipi_realize(DeviceState *dev, Error **errp)
+static void loongson_ipi_common_realize(DeviceState *dev, Error **errp)
{
LoongsonIPIState *s = LOONGSON_IPI(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
@@ -301,20 +301,31 @@ static void loongson_ipi_realize(DeviceState *dev, Error **errp)
sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem);
s->cpu = g_new0(IPICore, s->num_cpu);
- if (s->cpu == NULL) {
- error_setg(errp, "Memory allocation for IPICore faile");
+ for (i = 0; i < s->num_cpu; i++) {
+ s->cpu[i].ipi = s;
+
+ qdev_init_gpio_out(dev, &s->cpu[i].irq, 1);
+ }
+}
+
+static void loongson_ipi_realize(DeviceState *dev, Error **errp)
+{
+ LoongsonIPIState *s = LOONGSON_IPI(dev);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+ Error *local_err = NULL;
+
+ loongson_ipi_common_realize(dev, &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
return;
}
- for (i = 0; i < s->num_cpu; i++) {
- s->cpu[i].ipi = s;
+ for (unsigned i = 0; i < s->num_cpu; i++) {
s->cpu[i].ipi_mmio_mem = g_new0(MemoryRegion, 1);
g_autofree char *name = g_strdup_printf("loongson_ipi_cpu%d_mmio", i);
memory_region_init_io(s->cpu[i].ipi_mmio_mem, OBJECT(dev),
&loongson_ipi_core_ops, &s->cpu[i], name, 0x48);
sysbus_init_mmio(sbd, s->cpu[i].ipi_mmio_mem);
-
- qdev_init_gpio_out(dev, &s->cpu[i].irq, 1);
}
}
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v3 04/17] hw/intc/loongson_ipi: Extract loongson_ipi_common_realize()
2024-07-17 21:46 ` [PATCH v3 04/17] hw/intc/loongson_ipi: Extract loongson_ipi_common_realize() Philippe Mathieu-Daudé
@ 2024-07-18 2:11 ` maobibo
2024-07-18 8:01 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 20+ messages in thread
From: maobibo @ 2024-07-18 2:11 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang, Song Gao
On 2024/7/18 上午5:46, Philippe Mathieu-Daudé wrote:
> From: Bibo Mao <maobibo@loongson.cn>
>
> In preparation to extract common IPI code in few commits,
> extract loongson_ipi_common_realize().
>
> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
> [PMD: Extracted from bigger commit, added commit description]
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/intc/loongson_ipi.c | 25 ++++++++++++++++++-------
> 1 file changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
> index 3b3481c43e..40ac769aad 100644
> --- a/hw/intc/loongson_ipi.c
> +++ b/hw/intc/loongson_ipi.c
> @@ -275,7 +275,7 @@ static const MemoryRegionOps loongson_ipi64_ops = {
> .endianness = DEVICE_LITTLE_ENDIAN,
> };
>
> -static void loongson_ipi_realize(DeviceState *dev, Error **errp)
> +static void loongson_ipi_common_realize(DeviceState *dev, Error **errp)
> {
> LoongsonIPIState *s = LOONGSON_IPI(dev);
> SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
> @@ -301,20 +301,31 @@ static void loongson_ipi_realize(DeviceState *dev, Error **errp)
> sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem);
>
> s->cpu = g_new0(IPICore, s->num_cpu);
> - if (s->cpu == NULL) {
> - error_setg(errp, "Memory allocation for IPICore faile");
Philippe,
Thanks for the whole series, it looks to me. It is split into small
patches and adds new option CONFIG_LOONGSON_IPI_COMMON, it is easier to
review and compile for multiple targets.
One small nit, do we need keep checking sentence for if (s->cpu == NULL)?
Overall, for the whole series it is ok for me and works well on
LoongArch machine.
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
> + for (i = 0; i < s->num_cpu; i++) {
> + s->cpu[i].ipi = s;
> +
> + qdev_init_gpio_out(dev, &s->cpu[i].irq, 1);
> + }
> +}
> +
> +static void loongson_ipi_realize(DeviceState *dev, Error **errp)
> +{
> + LoongsonIPIState *s = LOONGSON_IPI(dev);
> + SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
> + Error *local_err = NULL;
> +
> + loongson_ipi_common_realize(dev, &local_err);
> + if (local_err) {
> + error_propagate(errp, local_err);
> return;
> }
>
> - for (i = 0; i < s->num_cpu; i++) {
> - s->cpu[i].ipi = s;
> + for (unsigned i = 0; i < s->num_cpu; i++) {
> s->cpu[i].ipi_mmio_mem = g_new0(MemoryRegion, 1);
> g_autofree char *name = g_strdup_printf("loongson_ipi_cpu%d_mmio", i);
> memory_region_init_io(s->cpu[i].ipi_mmio_mem, OBJECT(dev),
> &loongson_ipi_core_ops, &s->cpu[i], name, 0x48);
> sysbus_init_mmio(sbd, s->cpu[i].ipi_mmio_mem);
> -
> - qdev_init_gpio_out(dev, &s->cpu[i].irq, 1);
> }
> }
>
>
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v3 04/17] hw/intc/loongson_ipi: Extract loongson_ipi_common_realize()
2024-07-18 2:11 ` maobibo
@ 2024-07-18 8:01 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-18 8:01 UTC (permalink / raw)
To: maobibo, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang, Song Gao
On 18/7/24 04:11, maobibo wrote:
>
>
> On 2024/7/18 上午5:46, Philippe Mathieu-Daudé wrote:
>> From: Bibo Mao <maobibo@loongson.cn>
>>
>> In preparation to extract common IPI code in few commits,
>> extract loongson_ipi_common_realize().
>>
>> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
>> [PMD: Extracted from bigger commit, added commit description]
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>> hw/intc/loongson_ipi.c | 25 ++++++++++++++++++-------
>> 1 file changed, 18 insertions(+), 7 deletions(-)
>>
>> diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
>> index 3b3481c43e..40ac769aad 100644
>> --- a/hw/intc/loongson_ipi.c
>> +++ b/hw/intc/loongson_ipi.c
>> @@ -275,7 +275,7 @@ static const MemoryRegionOps loongson_ipi64_ops = {
>> .endianness = DEVICE_LITTLE_ENDIAN,
>> };
>> -static void loongson_ipi_realize(DeviceState *dev, Error **errp)
>> +static void loongson_ipi_common_realize(DeviceState *dev, Error **errp)
>> {
>> LoongsonIPIState *s = LOONGSON_IPI(dev);
>> SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
>> @@ -301,20 +301,31 @@ static void loongson_ipi_realize(DeviceState
>> *dev, Error **errp)
>> sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem);
>> s->cpu = g_new0(IPICore, s->num_cpu);
>> - if (s->cpu == NULL) {
>> - error_setg(errp, "Memory allocation for IPICore faile");
> Philippe,
>
> Thanks for the whole series, it looks to me. It is split into small
> patches and adds new option CONFIG_LOONGSON_IPI_COMMON, it is easier to
> review and compile for multiple targets.
>
> One small nit, do we need keep checking sentence for if (s->cpu == NULL)?
No because g_new0() can not fail. Checking return value only
makes sense for g_try_new0() which returns.
> Overall, for the whole series it is ok for me and works well on
> LoongArch machine.
Thanks!
> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
> Tested-by: Bibo Mao <maobibo@loongson.cn>
Jiaxun, do you mind re-testing the series for your MIPS machine?
Regards,
Phil.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v3 05/17] hw/intc/loongson_ipi: Add TYPE_LOONGSON_IPI_COMMON stub
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2024-07-17 21:46 ` [PATCH v3 04/17] hw/intc/loongson_ipi: Extract loongson_ipi_common_realize() Philippe Mathieu-Daudé
@ 2024-07-17 21:46 ` Philippe Mathieu-Daudé
2024-07-17 21:46 ` [PATCH v3 06/17] hw/intc/loongson_ipi: Move common definitions to loongson_ipi_common.h Philippe Mathieu-Daudé
` (11 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:46 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
Introduce LOONGSON_IPI_COMMON stubs, QDev parent of LOONGSON_IPI.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/intc/loongson_ipi.h | 13 +++++++++++--
include/hw/intc/loongson_ipi_common.h | 26 ++++++++++++++++++++++++++
hw/intc/loongson_ipi.c | 7 ++++---
hw/intc/loongson_ipi_common.c | 25 +++++++++++++++++++++++++
hw/intc/Kconfig | 4 ++++
hw/intc/meson.build | 1 +
6 files changed, 71 insertions(+), 5 deletions(-)
create mode 100644 include/hw/intc/loongson_ipi_common.h
create mode 100644 hw/intc/loongson_ipi_common.c
diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h
index efb772f384..82cb64ca40 100644
--- a/include/hw/intc/loongson_ipi.h
+++ b/include/hw/intc/loongson_ipi.h
@@ -8,6 +8,8 @@
#ifndef HW_LOONGSON_IPI_H
#define HW_LOONGSON_IPI_H
+#include "qom/object.h"
+#include "hw/intc/loongson_ipi_common.h"
#include "hw/sysbus.h"
/* Mainy used by iocsr read and write */
@@ -31,7 +33,7 @@
#define IPI_MBX_NUM 4
#define TYPE_LOONGSON_IPI "loongson_ipi"
-OBJECT_DECLARE_SIMPLE_TYPE(LoongsonIPIState, LOONGSON_IPI)
+OBJECT_DECLARE_TYPE(LoongsonIPIState, LoongsonIPIClass, LOONGSON_IPI)
typedef struct IPICore {
LoongsonIPIState *ipi;
@@ -45,8 +47,15 @@ typedef struct IPICore {
qemu_irq irq;
} IPICore;
+struct LoongsonIPIClass {
+ LoongsonIPICommonClass parent_class;
+
+ DeviceRealize parent_realize;
+};
+
struct LoongsonIPIState {
- SysBusDevice parent_obj;
+ LoongsonIPICommonState parent_obj;
+
MemoryRegion ipi_iocsr_mem;
MemoryRegion ipi64_iocsr_mem;
uint32_t num_cpu;
diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongson_ipi_common.h
new file mode 100644
index 0000000000..70ac69d0ba
--- /dev/null
+++ b/include/hw/intc/loongson_ipi_common.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Loongson ipi interrupt header files
+ *
+ * Copyright (C) 2021 Loongson Technology Corporation Limited
+ */
+
+#ifndef HW_LOONGSON_IPI_COMMON_H
+#define HW_LOONGSON_IPI_COMMON_H
+
+#include "qom/object.h"
+#include "hw/sysbus.h"
+
+#define TYPE_LOONGSON_IPI_COMMON "loongson_ipi_common"
+OBJECT_DECLARE_TYPE(LoongsonIPICommonState,
+ LoongsonIPICommonClass, LOONGSON_IPI_COMMON)
+
+struct LoongsonIPICommonState {
+ SysBusDevice parent_obj;
+};
+
+struct LoongsonIPICommonClass {
+ SysBusDeviceClass parent_class;
+};
+
+#endif
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index 40ac769aad..e8772f1b96 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -362,8 +362,10 @@ static Property ipi_properties[] = {
static void loongson_ipi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ LoongsonIPIClass *lic = LOONGSON_IPI_CLASS(klass);
- dc->realize = loongson_ipi_realize;
+ device_class_set_parent_realize(dc, loongson_ipi_realize,
+ &lic->parent_realize);
device_class_set_props(dc, ipi_properties);
dc->vmsd = &vmstate_loongson_ipi;
}
@@ -382,8 +384,7 @@ static void loongson_ipi_finalize(Object *obj)
static const TypeInfo loongson_ipi_info = {
.name = TYPE_LOONGSON_IPI,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(LoongsonIPIState),
+ .parent = TYPE_LOONGSON_IPI_COMMON,
.class_init = loongson_ipi_class_init,
.instance_finalize = loongson_ipi_finalize,
};
diff --git a/hw/intc/loongson_ipi_common.c b/hw/intc/loongson_ipi_common.c
new file mode 100644
index 0000000000..7e3f74d08a
--- /dev/null
+++ b/hw/intc/loongson_ipi_common.c
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Loongson ipi interrupt common support
+ *
+ * Copyright (C) 2021 Loongson Technology Corporation Limited
+ */
+
+#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "hw/intc/loongson_ipi_common.h"
+
+static const TypeInfo loongson_ipi_common_info = {
+ .name = TYPE_LOONGSON_IPI_COMMON,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(LoongsonIPICommonState),
+ .class_size = sizeof(LoongsonIPICommonClass),
+ .abstract = true,
+};
+
+static void loongson_ipi_common_register_types(void)
+{
+ type_register_static(&loongson_ipi_common_info);
+}
+
+type_init(loongson_ipi_common_register_types)
diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig
index 58b6d3a710..a2a0fdca85 100644
--- a/hw/intc/Kconfig
+++ b/hw/intc/Kconfig
@@ -87,8 +87,12 @@ config GOLDFISH_PIC
config M68K_IRQC
bool
+config LOONGSON_IPI_COMMON
+ bool
+
config LOONGSON_IPI
bool
+ select LOONGSON_IPI_COMMON
config LOONGARCH_PCH_PIC
bool
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
index afd1aa51ee..a09a527207 100644
--- a/hw/intc/meson.build
+++ b/hw/intc/meson.build
@@ -69,6 +69,7 @@ specific_ss.add(when: 'CONFIG_XIVE', if_true: files('xive.c'))
specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'],
if_true: files('spapr_xive_kvm.c'))
specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c'))
+specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c'))
specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c'))
specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c'))
specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c'))
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 06/17] hw/intc/loongson_ipi: Move common definitions to loongson_ipi_common.h
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2024-07-17 21:46 ` [PATCH v3 05/17] hw/intc/loongson_ipi: Add TYPE_LOONGSON_IPI_COMMON stub Philippe Mathieu-Daudé
@ 2024-07-17 21:46 ` Philippe Mathieu-Daudé
2024-07-17 21:46 ` [PATCH v3 07/17] hw/intc/loongson_ipi: Move IPICore::mmio_mem to LoongsonIPIState Philippe Mathieu-Daudé
` (10 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:46 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/intc/loongson_ipi.h | 18 ------------------
include/hw/intc/loongson_ipi_common.h | 19 +++++++++++++++++++
2 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h
index 82cb64ca40..d53bd5dcfe 100644
--- a/include/hw/intc/loongson_ipi.h
+++ b/include/hw/intc/loongson_ipi.h
@@ -12,24 +12,6 @@
#include "hw/intc/loongson_ipi_common.h"
#include "hw/sysbus.h"
-/* Mainy used by iocsr read and write */
-#define SMP_IPI_MAILBOX 0x1000ULL
-#define CORE_STATUS_OFF 0x0
-#define CORE_EN_OFF 0x4
-#define CORE_SET_OFF 0x8
-#define CORE_CLEAR_OFF 0xc
-#define CORE_BUF_20 0x20
-#define CORE_BUF_28 0x28
-#define CORE_BUF_30 0x30
-#define CORE_BUF_38 0x38
-#define IOCSR_IPI_SEND 0x40
-#define IOCSR_MAIL_SEND 0x48
-#define IOCSR_ANY_SEND 0x158
-
-#define MAIL_SEND_ADDR (SMP_IPI_MAILBOX + IOCSR_MAIL_SEND)
-#define MAIL_SEND_OFFSET 0
-#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND)
-
#define IPI_MBX_NUM 4
#define TYPE_LOONGSON_IPI "loongson_ipi"
diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongson_ipi_common.h
index 70ac69d0ba..b43b77bda6 100644
--- a/include/hw/intc/loongson_ipi_common.h
+++ b/include/hw/intc/loongson_ipi_common.h
@@ -23,4 +23,23 @@ struct LoongsonIPICommonClass {
SysBusDeviceClass parent_class;
};
+/* Mainy used by iocsr read and write */
+#define SMP_IPI_MAILBOX 0x1000ULL
+
+#define CORE_STATUS_OFF 0x0
+#define CORE_EN_OFF 0x4
+#define CORE_SET_OFF 0x8
+#define CORE_CLEAR_OFF 0xc
+#define CORE_BUF_20 0x20
+#define CORE_BUF_28 0x28
+#define CORE_BUF_30 0x30
+#define CORE_BUF_38 0x38
+#define IOCSR_IPI_SEND 0x40
+#define IOCSR_MAIL_SEND 0x48
+#define IOCSR_ANY_SEND 0x158
+
+#define MAIL_SEND_ADDR (SMP_IPI_MAILBOX + IOCSR_MAIL_SEND)
+#define MAIL_SEND_OFFSET 0
+#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND)
+
#endif
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 07/17] hw/intc/loongson_ipi: Move IPICore::mmio_mem to LoongsonIPIState
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2024-07-17 21:46 ` [PATCH v3 06/17] hw/intc/loongson_ipi: Move common definitions to loongson_ipi_common.h Philippe Mathieu-Daudé
@ 2024-07-17 21:46 ` Philippe Mathieu-Daudé
2024-07-17 21:46 ` [PATCH v3 08/17] hw/intc/loongson_ipi: Move IPICore structure to loongson_ipi_common.h Philippe Mathieu-Daudé
` (9 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:46 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
It is easier to manage one array of MMIO MR rather
than one per vCPU.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/intc/loongson_ipi.h | 2 +-
hw/intc/loongson_ipi.c | 9 ++++++---
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h
index d53bd5dcfe..00a65a82fb 100644
--- a/include/hw/intc/loongson_ipi.h
+++ b/include/hw/intc/loongson_ipi.h
@@ -19,7 +19,6 @@ OBJECT_DECLARE_TYPE(LoongsonIPIState, LoongsonIPIClass, LOONGSON_IPI)
typedef struct IPICore {
LoongsonIPIState *ipi;
- MemoryRegion *ipi_mmio_mem;
uint32_t status;
uint32_t en;
uint32_t set;
@@ -38,6 +37,7 @@ struct LoongsonIPIClass {
struct LoongsonIPIState {
LoongsonIPICommonState parent_obj;
+ MemoryRegion *ipi_mmio_mem;
MemoryRegion ipi_iocsr_mem;
MemoryRegion ipi64_iocsr_mem;
uint32_t num_cpu;
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index e8772f1b96..a9fca28430 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -320,12 +320,12 @@ static void loongson_ipi_realize(DeviceState *dev, Error **errp)
return;
}
+ s->ipi_mmio_mem = g_new0(MemoryRegion, s->num_cpu);
for (unsigned i = 0; i < s->num_cpu; i++) {
- s->cpu[i].ipi_mmio_mem = g_new0(MemoryRegion, 1);
g_autofree char *name = g_strdup_printf("loongson_ipi_cpu%d_mmio", i);
- memory_region_init_io(s->cpu[i].ipi_mmio_mem, OBJECT(dev),
+ memory_region_init_io(&s->ipi_mmio_mem[i], OBJECT(dev),
&loongson_ipi_core_ops, &s->cpu[i], name, 0x48);
- sysbus_init_mmio(sbd, s->cpu[i].ipi_mmio_mem);
+ sysbus_init_mmio(sbd, &s->ipi_mmio_mem[i]);
}
}
@@ -379,6 +379,9 @@ static void loongson_ipi_common_finalize(Object *obj)
static void loongson_ipi_finalize(Object *obj)
{
+ LoongsonIPIState *s = LOONGSON_IPI(obj);
+
+ g_free(s->ipi_mmio_mem);
loongson_ipi_common_finalize(obj);
}
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 08/17] hw/intc/loongson_ipi: Move IPICore structure to loongson_ipi_common.h
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2024-07-17 21:46 ` [PATCH v3 07/17] hw/intc/loongson_ipi: Move IPICore::mmio_mem to LoongsonIPIState Philippe Mathieu-Daudé
@ 2024-07-17 21:46 ` Philippe Mathieu-Daudé
2024-07-17 21:47 ` [PATCH v3 09/17] hw/intc/loongson_ipi: Pass LoongsonIPICommonState to send_ipi_data() Philippe Mathieu-Daudé
` (8 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:46 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
Move the IPICore structure and corresponding common fields
of LoongsonIPICommonState to "hw/intc/loongson_ipi_common.h".
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/intc/loongson_ipi.h | 17 --------
include/hw/intc/loongson_ipi_common.h | 18 +++++++++
hw/intc/loongson_ipi.c | 56 +++++----------------------
hw/intc/loongson_ipi_common.c | 50 ++++++++++++++++++++++++
4 files changed, 77 insertions(+), 64 deletions(-)
diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h
index 00a65a82fb..bb55899991 100644
--- a/include/hw/intc/loongson_ipi.h
+++ b/include/hw/intc/loongson_ipi.h
@@ -12,22 +12,9 @@
#include "hw/intc/loongson_ipi_common.h"
#include "hw/sysbus.h"
-#define IPI_MBX_NUM 4
-
#define TYPE_LOONGSON_IPI "loongson_ipi"
OBJECT_DECLARE_TYPE(LoongsonIPIState, LoongsonIPIClass, LOONGSON_IPI)
-typedef struct IPICore {
- LoongsonIPIState *ipi;
- uint32_t status;
- uint32_t en;
- uint32_t set;
- uint32_t clear;
- /* 64bit buf divide into 2 32bit buf */
- uint32_t buf[IPI_MBX_NUM * 2];
- qemu_irq irq;
-} IPICore;
-
struct LoongsonIPIClass {
LoongsonIPICommonClass parent_class;
@@ -38,10 +25,6 @@ struct LoongsonIPIState {
LoongsonIPICommonState parent_obj;
MemoryRegion *ipi_mmio_mem;
- MemoryRegion ipi_iocsr_mem;
- MemoryRegion ipi64_iocsr_mem;
- uint32_t num_cpu;
- IPICore *cpu;
};
#endif
diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongson_ipi_common.h
index b43b77bda6..891b43644d 100644
--- a/include/hw/intc/loongson_ipi_common.h
+++ b/include/hw/intc/loongson_ipi_common.h
@@ -11,12 +11,30 @@
#include "qom/object.h"
#include "hw/sysbus.h"
+#define IPI_MBX_NUM 4
+
#define TYPE_LOONGSON_IPI_COMMON "loongson_ipi_common"
OBJECT_DECLARE_TYPE(LoongsonIPICommonState,
LoongsonIPICommonClass, LOONGSON_IPI_COMMON)
+typedef struct IPICore {
+ LoongsonIPICommonState *ipi;
+ uint32_t status;
+ uint32_t en;
+ uint32_t set;
+ uint32_t clear;
+ /* 64bit buf divide into 2 32bit buf */
+ uint32_t buf[IPI_MBX_NUM * 2];
+ qemu_irq irq;
+} IPICore;
+
struct LoongsonIPICommonState {
SysBusDevice parent_obj;
+
+ MemoryRegion ipi_iocsr_mem;
+ MemoryRegion ipi64_iocsr_mem;
+ uint32_t num_cpu;
+ IPICore *cpu;
};
struct LoongsonIPICommonClass {
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index a9fca28430..5346bbb267 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -64,7 +64,7 @@ static MemTxResult loongson_ipi_iocsr_readl(void *opaque, hwaddr addr,
uint64_t *data,
unsigned size, MemTxAttrs attrs)
{
- LoongsonIPIState *ipi = opaque;
+ LoongsonIPICommonState *ipi = opaque;
IPICore *s;
if (attrs.requester_id >= ipi->num_cpu) {
@@ -160,7 +160,7 @@ static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr,
MemTxAttrs attrs)
{
IPICore *s = opaque;
- LoongsonIPIState *ipi = s->ipi;
+ LoongsonIPICommonState *ipi = s->ipi;
int index = 0;
uint32_t cpuid;
uint8_t vector;
@@ -214,7 +214,7 @@ static MemTxResult loongson_ipi_iocsr_writel(void *opaque, hwaddr addr,
uint64_t val, unsigned size,
MemTxAttrs attrs)
{
- LoongsonIPIState *ipi = opaque;
+ LoongsonIPICommonState *ipi = opaque;
IPICore *s;
if (attrs.requester_id >= ipi->num_cpu) {
@@ -277,7 +277,7 @@ static const MemoryRegionOps loongson_ipi64_ops = {
static void loongson_ipi_common_realize(DeviceState *dev, Error **errp)
{
- LoongsonIPIState *s = LOONGSON_IPI(dev);
+ LoongsonIPICommonState *s = LOONGSON_IPI_COMMON(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
int i;
@@ -310,6 +310,7 @@ static void loongson_ipi_common_realize(DeviceState *dev, Error **errp)
static void loongson_ipi_realize(DeviceState *dev, Error **errp)
{
+ LoongsonIPICommonState *sc = LOONGSON_IPI_COMMON(dev);
LoongsonIPIState *s = LOONGSON_IPI(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
Error *local_err = NULL;
@@ -320,45 +321,16 @@ static void loongson_ipi_realize(DeviceState *dev, Error **errp)
return;
}
- s->ipi_mmio_mem = g_new0(MemoryRegion, s->num_cpu);
- for (unsigned i = 0; i < s->num_cpu; i++) {
+ s->ipi_mmio_mem = g_new0(MemoryRegion, sc->num_cpu);
+ for (unsigned i = 0; i < sc->num_cpu; i++) {
g_autofree char *name = g_strdup_printf("loongson_ipi_cpu%d_mmio", i);
+
memory_region_init_io(&s->ipi_mmio_mem[i], OBJECT(dev),
- &loongson_ipi_core_ops, &s->cpu[i], name, 0x48);
+ &loongson_ipi_core_ops, &sc->cpu[i], name, 0x48);
sysbus_init_mmio(sbd, &s->ipi_mmio_mem[i]);
}
}
-static const VMStateDescription vmstate_ipi_core = {
- .name = "ipi-single",
- .version_id = 2,
- .minimum_version_id = 2,
- .fields = (const VMStateField[]) {
- VMSTATE_UINT32(status, IPICore),
- VMSTATE_UINT32(en, IPICore),
- VMSTATE_UINT32(set, IPICore),
- VMSTATE_UINT32(clear, IPICore),
- VMSTATE_UINT32_ARRAY(buf, IPICore, IPI_MBX_NUM * 2),
- VMSTATE_END_OF_LIST()
- }
-};
-
-static const VMStateDescription vmstate_loongson_ipi = {
- .name = TYPE_LOONGSON_IPI,
- .version_id = 2,
- .minimum_version_id = 2,
- .fields = (const VMStateField[]) {
- VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongsonIPIState, num_cpu,
- vmstate_ipi_core, IPICore),
- VMSTATE_END_OF_LIST()
- }
-};
-
-static Property ipi_properties[] = {
- DEFINE_PROP_UINT32("num-cpu", LoongsonIPIState, num_cpu, 1),
- DEFINE_PROP_END_OF_LIST(),
-};
-
static void loongson_ipi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -366,15 +338,6 @@ static void loongson_ipi_class_init(ObjectClass *klass, void *data)
device_class_set_parent_realize(dc, loongson_ipi_realize,
&lic->parent_realize);
- device_class_set_props(dc, ipi_properties);
- dc->vmsd = &vmstate_loongson_ipi;
-}
-
-static void loongson_ipi_common_finalize(Object *obj)
-{
- LoongsonIPIState *s = LOONGSON_IPI(obj);
-
- g_free(s->cpu);
}
static void loongson_ipi_finalize(Object *obj)
@@ -382,7 +345,6 @@ static void loongson_ipi_finalize(Object *obj)
LoongsonIPIState *s = LOONGSON_IPI(obj);
g_free(s->ipi_mmio_mem);
- loongson_ipi_common_finalize(obj);
}
static const TypeInfo loongson_ipi_info = {
diff --git a/hw/intc/loongson_ipi_common.c b/hw/intc/loongson_ipi_common.c
index 7e3f74d08a..13b5ecef31 100644
--- a/hw/intc/loongson_ipi_common.c
+++ b/hw/intc/loongson_ipi_common.c
@@ -8,12 +8,62 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "hw/intc/loongson_ipi_common.h"
+#include "hw/qdev-properties.h"
+#include "migration/vmstate.h"
+
+static void loongson_ipi_common_finalize(Object *obj)
+{
+ LoongsonIPICommonState *s = LOONGSON_IPI_COMMON(obj);
+
+ g_free(s->cpu);
+}
+
+static const VMStateDescription vmstate_ipi_core = {
+ .name = "ipi-single",
+ .version_id = 2,
+ .minimum_version_id = 2,
+ .fields = (const VMStateField[]) {
+ VMSTATE_UINT32(status, IPICore),
+ VMSTATE_UINT32(en, IPICore),
+ VMSTATE_UINT32(set, IPICore),
+ VMSTATE_UINT32(clear, IPICore),
+ VMSTATE_UINT32_ARRAY(buf, IPICore, IPI_MBX_NUM * 2),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static const VMStateDescription vmstate_loongson_ipi = {
+ .name = "loongson_ipi",
+ .version_id = 2,
+ .minimum_version_id = 2,
+ .fields = (const VMStateField[]) {
+ VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongsonIPICommonState,
+ num_cpu, vmstate_ipi_core,
+ IPICore),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static Property ipi_properties[] = {
+ DEFINE_PROP_UINT32("num-cpu", LoongsonIPICommonState, num_cpu, 1),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void loongson_ipi_common_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ device_class_set_props(dc, ipi_properties);
+ dc->vmsd = &vmstate_loongson_ipi;
+}
static const TypeInfo loongson_ipi_common_info = {
.name = TYPE_LOONGSON_IPI_COMMON,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(LoongsonIPICommonState),
.class_size = sizeof(LoongsonIPICommonClass),
+ .class_init = loongson_ipi_common_class_init,
+ .instance_finalize = loongson_ipi_common_finalize,
.abstract = true,
};
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 09/17] hw/intc/loongson_ipi: Pass LoongsonIPICommonState to send_ipi_data()
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2024-07-17 21:46 ` [PATCH v3 08/17] hw/intc/loongson_ipi: Move IPICore structure to loongson_ipi_common.h Philippe Mathieu-Daudé
@ 2024-07-17 21:47 ` Philippe Mathieu-Daudé
2024-07-17 21:47 ` [PATCH v3 10/17] hw/intc/loongson_ipi: Add LoongsonIPICommonClass::get_iocsr_as handler Philippe Mathieu-Daudé
` (7 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:47 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
In order to get LoongsonIPICommonClass in send_ipi_data()
in the next commit, propagate LoongsonIPICommonState.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/intc/loongson_ipi.c | 19 +++++++++++--------
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index 5346bbb267..8acd563db9 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -88,8 +88,8 @@ static AddressSpace *get_cpu_iocsr_as(CPUState *cpu)
return NULL;
}
-static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr,
- MemTxAttrs attrs)
+static MemTxResult send_ipi_data(LoongsonIPICommonState *ipi, CPUState *cpu,
+ uint64_t val, hwaddr addr, MemTxAttrs attrs)
{
int i, mask = 0, data = 0;
AddressSpace *iocsr_as = get_cpu_iocsr_as(cpu);
@@ -119,7 +119,8 @@ static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr,
return MEMTX_OK;
}
-static MemTxResult mail_send(uint64_t val, MemTxAttrs attrs)
+static MemTxResult mail_send(LoongsonIPICommonState *ipi,
+ uint64_t val, MemTxAttrs attrs)
{
uint32_t cpuid;
hwaddr addr;
@@ -134,10 +135,11 @@ static MemTxResult mail_send(uint64_t val, MemTxAttrs attrs)
/* override requester_id */
addr = SMP_IPI_MAILBOX + CORE_BUF_20 + (val & 0x1c);
attrs.requester_id = cs->cpu_index;
- return send_ipi_data(cs, val, addr, attrs);
+ return send_ipi_data(ipi, cs, val, addr, attrs);
}
-static MemTxResult any_send(uint64_t val, MemTxAttrs attrs)
+static MemTxResult any_send(LoongsonIPICommonState *ipi,
+ uint64_t val, MemTxAttrs attrs)
{
uint32_t cpuid;
hwaddr addr;
@@ -152,7 +154,7 @@ static MemTxResult any_send(uint64_t val, MemTxAttrs attrs)
/* override requester_id */
addr = val & 0xffff;
attrs.requester_id = cs->cpu_index;
- return send_ipi_data(cs, val, addr, attrs);
+ return send_ipi_data(ipi, cs, val, addr, attrs);
}
static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr,
@@ -249,15 +251,16 @@ static const MemoryRegionOps loongson_ipi_iocsr_ops = {
static MemTxResult loongson_ipi_writeq(void *opaque, hwaddr addr, uint64_t val,
unsigned size, MemTxAttrs attrs)
{
+ LoongsonIPICommonState *ipi = opaque;
MemTxResult ret = MEMTX_OK;
addr &= 0xfff;
switch (addr) {
case MAIL_SEND_OFFSET:
- ret = mail_send(val, attrs);
+ ret = mail_send(ipi, val, attrs);
break;
case ANY_SEND_OFFSET:
- ret = any_send(val, attrs);
+ ret = any_send(ipi, val, attrs);
break;
default:
break;
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 10/17] hw/intc/loongson_ipi: Add LoongsonIPICommonClass::get_iocsr_as handler
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2024-07-17 21:47 ` [PATCH v3 09/17] hw/intc/loongson_ipi: Pass LoongsonIPICommonState to send_ipi_data() Philippe Mathieu-Daudé
@ 2024-07-17 21:47 ` Philippe Mathieu-Daudé
2024-07-17 21:47 ` [PATCH v3 11/17] hw/intc/loongson_ipi: Add LoongsonIPICommonClass::cpu_by_arch_id handler Philippe Mathieu-Daudé
` (6 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:47 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
Allow Loongson IPI implementations to have their own get_iocsr_as()
handler.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/intc/loongson_ipi_common.h | 2 ++
hw/intc/loongson_ipi.c | 16 ++++++++++++----
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongson_ipi_common.h
index 891b43644d..e49c156db3 100644
--- a/include/hw/intc/loongson_ipi_common.h
+++ b/include/hw/intc/loongson_ipi_common.h
@@ -39,6 +39,8 @@ struct LoongsonIPICommonState {
struct LoongsonIPICommonClass {
SysBusDeviceClass parent_class;
+
+ AddressSpace *(*get_iocsr_as)(CPUState *cpu);
};
/* Mainy used by iocsr read and write */
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index 8acd563db9..4a7a1fa38d 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -75,24 +75,30 @@ static MemTxResult loongson_ipi_iocsr_readl(void *opaque, hwaddr addr,
return loongson_ipi_core_readl(s, addr, data, size, attrs);
}
-static AddressSpace *get_cpu_iocsr_as(CPUState *cpu)
-{
#ifdef TARGET_LOONGARCH64
+static AddressSpace *get_iocsr_as(CPUState *cpu)
+{
return LOONGARCH_CPU(cpu)->env.address_space_iocsr;
+}
#endif
+
#ifdef TARGET_MIPS
+static AddressSpace *get_iocsr_as(CPUState *cpu)
+{
if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) {
return &MIPS_CPU(cpu)->env.iocsr.as;
}
-#endif
+
return NULL;
}
+#endif
static MemTxResult send_ipi_data(LoongsonIPICommonState *ipi, CPUState *cpu,
uint64_t val, hwaddr addr, MemTxAttrs attrs)
{
+ LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
int i, mask = 0, data = 0;
- AddressSpace *iocsr_as = get_cpu_iocsr_as(cpu);
+ AddressSpace *iocsr_as = licc->get_iocsr_as(cpu);
if (!iocsr_as) {
return MEMTX_DECODE_ERROR;
@@ -338,9 +344,11 @@ static void loongson_ipi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
LoongsonIPIClass *lic = LOONGSON_IPI_CLASS(klass);
+ LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass);
device_class_set_parent_realize(dc, loongson_ipi_realize,
&lic->parent_realize);
+ licc->get_iocsr_as = get_iocsr_as;
}
static void loongson_ipi_finalize(Object *obj)
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 11/17] hw/intc/loongson_ipi: Add LoongsonIPICommonClass::cpu_by_arch_id handler
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2024-07-17 21:47 ` [PATCH v3 10/17] hw/intc/loongson_ipi: Add LoongsonIPICommonClass::get_iocsr_as handler Philippe Mathieu-Daudé
@ 2024-07-17 21:47 ` Philippe Mathieu-Daudé
2024-07-17 21:47 ` [PATCH v3 12/17] hw/intc/loongson_ipi: Expose loongson_ipi_core_read/write helpers Philippe Mathieu-Daudé
` (5 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:47 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
Allow Loongson IPI implementations to have their own cpu_by_arch_id()
handler.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/intc/loongson_ipi_common.h | 1 +
hw/intc/loongson_ipi.c | 10 +++++++---
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongson_ipi_common.h
index e49c156db3..5447e9f650 100644
--- a/include/hw/intc/loongson_ipi_common.h
+++ b/include/hw/intc/loongson_ipi_common.h
@@ -41,6 +41,7 @@ struct LoongsonIPICommonClass {
SysBusDeviceClass parent_class;
AddressSpace *(*get_iocsr_as)(CPUState *cpu);
+ CPUState *(*cpu_by_arch_id)(int64_t id);
};
/* Mainy used by iocsr read and write */
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index 4a7a1fa38d..603a88356d 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -128,12 +128,13 @@ static MemTxResult send_ipi_data(LoongsonIPICommonState *ipi, CPUState *cpu,
static MemTxResult mail_send(LoongsonIPICommonState *ipi,
uint64_t val, MemTxAttrs attrs)
{
+ LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
uint32_t cpuid;
hwaddr addr;
CPUState *cs;
cpuid = extract32(val, 16, 10);
- cs = cpu_by_arch_id(cpuid);
+ cs = licc->cpu_by_arch_id(cpuid);
if (cs == NULL) {
return MEMTX_DECODE_ERROR;
}
@@ -147,12 +148,13 @@ static MemTxResult mail_send(LoongsonIPICommonState *ipi,
static MemTxResult any_send(LoongsonIPICommonState *ipi,
uint64_t val, MemTxAttrs attrs)
{
+ LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
uint32_t cpuid;
hwaddr addr;
CPUState *cs;
cpuid = extract32(val, 16, 10);
- cs = cpu_by_arch_id(cpuid);
+ cs = licc->cpu_by_arch_id(cpuid);
if (cs == NULL) {
return MEMTX_DECODE_ERROR;
}
@@ -169,6 +171,7 @@ static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr,
{
IPICore *s = opaque;
LoongsonIPICommonState *ipi = s->ipi;
+ LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
int index = 0;
uint32_t cpuid;
uint8_t vector;
@@ -203,7 +206,7 @@ static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr,
cpuid = extract32(val, 16, 10);
/* IPI status vector */
vector = extract8(val, 0, 5);
- cs = cpu_by_arch_id(cpuid);
+ cs = licc->cpu_by_arch_id(cpuid);
if (cs == NULL || cs->cpu_index >= ipi->num_cpu) {
return MEMTX_DECODE_ERROR;
}
@@ -349,6 +352,7 @@ static void loongson_ipi_class_init(ObjectClass *klass, void *data)
device_class_set_parent_realize(dc, loongson_ipi_realize,
&lic->parent_realize);
licc->get_iocsr_as = get_iocsr_as;
+ licc->cpu_by_arch_id = cpu_by_arch_id;
}
static void loongson_ipi_finalize(Object *obj)
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 12/17] hw/intc/loongson_ipi: Expose loongson_ipi_core_read/write helpers
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (10 preceding siblings ...)
2024-07-17 21:47 ` [PATCH v3 11/17] hw/intc/loongson_ipi: Add LoongsonIPICommonClass::cpu_by_arch_id handler Philippe Mathieu-Daudé
@ 2024-07-17 21:47 ` Philippe Mathieu-Daudé
2024-07-17 21:47 ` [PATCH v3 13/17] hw/intc/loongson_ipi: Move common code to loongson_ipi_common.c Philippe Mathieu-Daudé
` (4 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:47 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
In order to access loongson_ipi_core_read/write helpers
from loongson_ipi_common.c in the next commit, make their
prototype declaration public.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/intc/loongson_ipi_common.h | 6 ++++++
hw/intc/loongson_ipi.c | 10 ++++------
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongson_ipi_common.h
index 5447e9f650..a75882f775 100644
--- a/include/hw/intc/loongson_ipi_common.h
+++ b/include/hw/intc/loongson_ipi_common.h
@@ -10,6 +10,7 @@
#include "qom/object.h"
#include "hw/sysbus.h"
+#include "exec/memattrs.h"
#define IPI_MBX_NUM 4
@@ -44,6 +45,11 @@ struct LoongsonIPICommonClass {
CPUState *(*cpu_by_arch_id)(int64_t id);
};
+MemTxResult loongson_ipi_core_readl(void *opaque, hwaddr addr, uint64_t *data,
+ unsigned size, MemTxAttrs attrs);
+MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size, MemTxAttrs attrs);
+
/* Mainy used by iocsr read and write */
#define SMP_IPI_MAILBOX 0x1000ULL
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index 603a88356d..227fd667d9 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -24,9 +24,8 @@
#endif
#include "trace.h"
-static MemTxResult loongson_ipi_core_readl(void *opaque, hwaddr addr,
- uint64_t *data,
- unsigned size, MemTxAttrs attrs)
+MemTxResult loongson_ipi_core_readl(void *opaque, hwaddr addr, uint64_t *data,
+ unsigned size, MemTxAttrs attrs)
{
IPICore *s = opaque;
uint64_t ret = 0;
@@ -165,9 +164,8 @@ static MemTxResult any_send(LoongsonIPICommonState *ipi,
return send_ipi_data(ipi, cs, val, addr, attrs);
}
-static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr,
- uint64_t val, unsigned size,
- MemTxAttrs attrs)
+MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size, MemTxAttrs attrs)
{
IPICore *s = opaque;
LoongsonIPICommonState *ipi = s->ipi;
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 13/17] hw/intc/loongson_ipi: Move common code to loongson_ipi_common.c
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (11 preceding siblings ...)
2024-07-17 21:47 ` [PATCH v3 12/17] hw/intc/loongson_ipi: Expose loongson_ipi_core_read/write helpers Philippe Mathieu-Daudé
@ 2024-07-17 21:47 ` Philippe Mathieu-Daudé
2024-07-17 21:47 ` [PATCH v3 14/17] hw/intc/loongarch_ipi: Add loongarch IPI support Philippe Mathieu-Daudé
` (3 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:47 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
Move the common code from loongson_ipi.c to loongson_ipi_common.c,
call parent_realize() instead of loongson_ipi_common_realize() in
loongson_ipi_realize().
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/intc/loongson_ipi.c | 269 +--------------------------------
hw/intc/loongson_ipi_common.c | 272 ++++++++++++++++++++++++++++++++++
2 files changed, 274 insertions(+), 267 deletions(-)
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index 227fd667d9..464bb6b580 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -24,56 +24,6 @@
#endif
#include "trace.h"
-MemTxResult loongson_ipi_core_readl(void *opaque, hwaddr addr, uint64_t *data,
- unsigned size, MemTxAttrs attrs)
-{
- IPICore *s = opaque;
- uint64_t ret = 0;
- int index = 0;
-
- addr &= 0xff;
- switch (addr) {
- case CORE_STATUS_OFF:
- ret = s->status;
- break;
- case CORE_EN_OFF:
- ret = s->en;
- break;
- case CORE_SET_OFF:
- ret = 0;
- break;
- case CORE_CLEAR_OFF:
- ret = 0;
- break;
- case CORE_BUF_20 ... CORE_BUF_38 + 4:
- index = (addr - CORE_BUF_20) >> 2;
- ret = s->buf[index];
- break;
- default:
- qemu_log_mask(LOG_UNIMP, "invalid read: %x", (uint32_t)addr);
- break;
- }
-
- trace_loongson_ipi_read(size, (uint64_t)addr, ret);
- *data = ret;
- return MEMTX_OK;
-}
-
-static MemTxResult loongson_ipi_iocsr_readl(void *opaque, hwaddr addr,
- uint64_t *data,
- unsigned size, MemTxAttrs attrs)
-{
- LoongsonIPICommonState *ipi = opaque;
- IPICore *s;
-
- if (attrs.requester_id >= ipi->num_cpu) {
- return MEMTX_DECODE_ERROR;
- }
-
- s = &ipi->cpu[attrs.requester_id];
- return loongson_ipi_core_readl(s, addr, data, size, attrs);
-}
-
#ifdef TARGET_LOONGARCH64
static AddressSpace *get_iocsr_as(CPUState *cpu)
{
@@ -92,148 +42,6 @@ static AddressSpace *get_iocsr_as(CPUState *cpu)
}
#endif
-static MemTxResult send_ipi_data(LoongsonIPICommonState *ipi, CPUState *cpu,
- uint64_t val, hwaddr addr, MemTxAttrs attrs)
-{
- LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
- int i, mask = 0, data = 0;
- AddressSpace *iocsr_as = licc->get_iocsr_as(cpu);
-
- if (!iocsr_as) {
- return MEMTX_DECODE_ERROR;
- }
-
- /*
- * bit 27-30 is mask for byte writing,
- * if the mask is 0, we need not to do anything.
- */
- if ((val >> 27) & 0xf) {
- data = address_space_ldl_le(iocsr_as, addr, attrs, NULL);
- for (i = 0; i < 4; i++) {
- /* get mask for byte writing */
- if (val & (0x1 << (27 + i))) {
- mask |= 0xff << (i * 8);
- }
- }
- }
-
- data &= mask;
- data |= (val >> 32) & ~mask;
- address_space_stl_le(iocsr_as, addr, data, attrs, NULL);
-
- return MEMTX_OK;
-}
-
-static MemTxResult mail_send(LoongsonIPICommonState *ipi,
- uint64_t val, MemTxAttrs attrs)
-{
- LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
- uint32_t cpuid;
- hwaddr addr;
- CPUState *cs;
-
- cpuid = extract32(val, 16, 10);
- cs = licc->cpu_by_arch_id(cpuid);
- if (cs == NULL) {
- return MEMTX_DECODE_ERROR;
- }
-
- /* override requester_id */
- addr = SMP_IPI_MAILBOX + CORE_BUF_20 + (val & 0x1c);
- attrs.requester_id = cs->cpu_index;
- return send_ipi_data(ipi, cs, val, addr, attrs);
-}
-
-static MemTxResult any_send(LoongsonIPICommonState *ipi,
- uint64_t val, MemTxAttrs attrs)
-{
- LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
- uint32_t cpuid;
- hwaddr addr;
- CPUState *cs;
-
- cpuid = extract32(val, 16, 10);
- cs = licc->cpu_by_arch_id(cpuid);
- if (cs == NULL) {
- return MEMTX_DECODE_ERROR;
- }
-
- /* override requester_id */
- addr = val & 0xffff;
- attrs.requester_id = cs->cpu_index;
- return send_ipi_data(ipi, cs, val, addr, attrs);
-}
-
-MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, uint64_t val,
- unsigned size, MemTxAttrs attrs)
-{
- IPICore *s = opaque;
- LoongsonIPICommonState *ipi = s->ipi;
- LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
- int index = 0;
- uint32_t cpuid;
- uint8_t vector;
- CPUState *cs;
-
- addr &= 0xff;
- trace_loongson_ipi_write(size, (uint64_t)addr, val);
- switch (addr) {
- case CORE_STATUS_OFF:
- qemu_log_mask(LOG_GUEST_ERROR, "can not be written");
- break;
- case CORE_EN_OFF:
- s->en = val;
- break;
- case CORE_SET_OFF:
- s->status |= val;
- if (s->status != 0 && (s->status & s->en) != 0) {
- qemu_irq_raise(s->irq);
- }
- break;
- case CORE_CLEAR_OFF:
- s->status &= ~val;
- if (s->status == 0 && s->en != 0) {
- qemu_irq_lower(s->irq);
- }
- break;
- case CORE_BUF_20 ... CORE_BUF_38 + 4:
- index = (addr - CORE_BUF_20) >> 2;
- s->buf[index] = val;
- break;
- case IOCSR_IPI_SEND:
- cpuid = extract32(val, 16, 10);
- /* IPI status vector */
- vector = extract8(val, 0, 5);
- cs = licc->cpu_by_arch_id(cpuid);
- if (cs == NULL || cs->cpu_index >= ipi->num_cpu) {
- return MEMTX_DECODE_ERROR;
- }
- loongson_ipi_core_writel(&ipi->cpu[cs->cpu_index], CORE_SET_OFF,
- BIT(vector), 4, attrs);
- break;
- default:
- qemu_log_mask(LOG_UNIMP, "invalid write: %x", (uint32_t)addr);
- break;
- }
-
- return MEMTX_OK;
-}
-
-static MemTxResult loongson_ipi_iocsr_writel(void *opaque, hwaddr addr,
- uint64_t val, unsigned size,
- MemTxAttrs attrs)
-{
- LoongsonIPICommonState *ipi = opaque;
- IPICore *s;
-
- if (attrs.requester_id >= ipi->num_cpu) {
- return MEMTX_DECODE_ERROR;
- }
-
- s = &ipi->cpu[attrs.requester_id];
- return loongson_ipi_core_writel(s, addr, val, size, attrs);
-}
-
static const MemoryRegionOps loongson_ipi_core_ops = {
.read_with_attrs = loongson_ipi_core_readl,
.write_with_attrs = loongson_ipi_core_writel,
@@ -244,88 +52,15 @@ static const MemoryRegionOps loongson_ipi_core_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
-static const MemoryRegionOps loongson_ipi_iocsr_ops = {
- .read_with_attrs = loongson_ipi_iocsr_readl,
- .write_with_attrs = loongson_ipi_iocsr_writel,
- .impl.min_access_size = 4,
- .impl.max_access_size = 4,
- .valid.min_access_size = 4,
- .valid.max_access_size = 8,
- .endianness = DEVICE_LITTLE_ENDIAN,
-};
-
-/* mail send and any send only support writeq */
-static MemTxResult loongson_ipi_writeq(void *opaque, hwaddr addr, uint64_t val,
- unsigned size, MemTxAttrs attrs)
-{
- LoongsonIPICommonState *ipi = opaque;
- MemTxResult ret = MEMTX_OK;
-
- addr &= 0xfff;
- switch (addr) {
- case MAIL_SEND_OFFSET:
- ret = mail_send(ipi, val, attrs);
- break;
- case ANY_SEND_OFFSET:
- ret = any_send(ipi, val, attrs);
- break;
- default:
- break;
- }
-
- return ret;
-}
-
-static const MemoryRegionOps loongson_ipi64_ops = {
- .write_with_attrs = loongson_ipi_writeq,
- .impl.min_access_size = 8,
- .impl.max_access_size = 8,
- .valid.min_access_size = 8,
- .valid.max_access_size = 8,
- .endianness = DEVICE_LITTLE_ENDIAN,
-};
-
-static void loongson_ipi_common_realize(DeviceState *dev, Error **errp)
-{
- LoongsonIPICommonState *s = LOONGSON_IPI_COMMON(dev);
- SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
- int i;
-
- if (s->num_cpu == 0) {
- error_setg(errp, "num-cpu must be at least 1");
- return;
- }
-
- memory_region_init_io(&s->ipi_iocsr_mem, OBJECT(dev),
- &loongson_ipi_iocsr_ops,
- s, "loongson_ipi_iocsr", 0x48);
-
- /* loongson_ipi_iocsr performs re-entrant IO through ipi_send */
- s->ipi_iocsr_mem.disable_reentrancy_guard = true;
-
- sysbus_init_mmio(sbd, &s->ipi_iocsr_mem);
-
- memory_region_init_io(&s->ipi64_iocsr_mem, OBJECT(dev),
- &loongson_ipi64_ops,
- s, "loongson_ipi64_iocsr", 0x118);
- sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem);
-
- s->cpu = g_new0(IPICore, s->num_cpu);
- for (i = 0; i < s->num_cpu; i++) {
- s->cpu[i].ipi = s;
-
- qdev_init_gpio_out(dev, &s->cpu[i].irq, 1);
- }
-}
-
static void loongson_ipi_realize(DeviceState *dev, Error **errp)
{
LoongsonIPICommonState *sc = LOONGSON_IPI_COMMON(dev);
LoongsonIPIState *s = LOONGSON_IPI(dev);
+ LoongsonIPIClass *lic = LOONGSON_IPI_GET_CLASS(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
Error *local_err = NULL;
- loongson_ipi_common_realize(dev, &local_err);
+ lic->parent_realize(dev, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
diff --git a/hw/intc/loongson_ipi_common.c b/hw/intc/loongson_ipi_common.c
index 13b5ecef31..bdfae8343b 100644
--- a/hw/intc/loongson_ipi_common.c
+++ b/hw/intc/loongson_ipi_common.c
@@ -8,8 +8,279 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "hw/intc/loongson_ipi_common.h"
+#include "hw/irq.h"
#include "hw/qdev-properties.h"
+#include "qapi/error.h"
+#include "qemu/log.h"
#include "migration/vmstate.h"
+#include "trace.h"
+
+MemTxResult loongson_ipi_core_readl(void *opaque, hwaddr addr, uint64_t *data,
+ unsigned size, MemTxAttrs attrs)
+{
+ IPICore *s = opaque;
+ uint64_t ret = 0;
+ int index = 0;
+
+ addr &= 0xff;
+ switch (addr) {
+ case CORE_STATUS_OFF:
+ ret = s->status;
+ break;
+ case CORE_EN_OFF:
+ ret = s->en;
+ break;
+ case CORE_SET_OFF:
+ ret = 0;
+ break;
+ case CORE_CLEAR_OFF:
+ ret = 0;
+ break;
+ case CORE_BUF_20 ... CORE_BUF_38 + 4:
+ index = (addr - CORE_BUF_20) >> 2;
+ ret = s->buf[index];
+ break;
+ default:
+ qemu_log_mask(LOG_UNIMP, "invalid read: %x", (uint32_t)addr);
+ break;
+ }
+
+ trace_loongson_ipi_read(size, (uint64_t)addr, ret);
+ *data = ret;
+
+ return MEMTX_OK;
+}
+
+static MemTxResult loongson_ipi_iocsr_readl(void *opaque, hwaddr addr,
+ uint64_t *data, unsigned size,
+ MemTxAttrs attrs)
+{
+ LoongsonIPICommonState *ipi = opaque;
+ IPICore *s;
+
+ if (attrs.requester_id >= ipi->num_cpu) {
+ return MEMTX_DECODE_ERROR;
+ }
+
+ s = &ipi->cpu[attrs.requester_id];
+ return loongson_ipi_core_readl(s, addr, data, size, attrs);
+}
+
+static MemTxResult send_ipi_data(LoongsonIPICommonState *ipi, CPUState *cpu,
+ uint64_t val, hwaddr addr, MemTxAttrs attrs)
+{
+ LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
+ int i, mask = 0, data = 0;
+ AddressSpace *iocsr_as = licc->get_iocsr_as(cpu);
+
+ if (!iocsr_as) {
+ return MEMTX_DECODE_ERROR;
+ }
+
+ /*
+ * bit 27-30 is mask for byte writing,
+ * if the mask is 0, we need not to do anything.
+ */
+ if ((val >> 27) & 0xf) {
+ data = address_space_ldl_le(iocsr_as, addr, attrs, NULL);
+ for (i = 0; i < 4; i++) {
+ /* get mask for byte writing */
+ if (val & (0x1 << (27 + i))) {
+ mask |= 0xff << (i * 8);
+ }
+ }
+ }
+
+ data &= mask;
+ data |= (val >> 32) & ~mask;
+ address_space_stl_le(iocsr_as, addr, data, attrs, NULL);
+
+ return MEMTX_OK;
+}
+
+static MemTxResult mail_send(LoongsonIPICommonState *ipi,
+ uint64_t val, MemTxAttrs attrs)
+{
+ LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
+ uint32_t cpuid;
+ hwaddr addr;
+ CPUState *cs;
+
+ cpuid = extract32(val, 16, 10);
+ cs = licc->cpu_by_arch_id(cpuid);
+ if (cs == NULL) {
+ return MEMTX_DECODE_ERROR;
+ }
+
+ /* override requester_id */
+ addr = SMP_IPI_MAILBOX + CORE_BUF_20 + (val & 0x1c);
+ attrs.requester_id = cs->cpu_index;
+ return send_ipi_data(ipi, cs, val, addr, attrs);
+}
+
+static MemTxResult any_send(LoongsonIPICommonState *ipi,
+ uint64_t val, MemTxAttrs attrs)
+{
+ LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
+ uint32_t cpuid;
+ hwaddr addr;
+ CPUState *cs;
+
+ cpuid = extract32(val, 16, 10);
+ cs = licc->cpu_by_arch_id(cpuid);
+ if (cs == NULL) {
+ return MEMTX_DECODE_ERROR;
+ }
+
+ /* override requester_id */
+ addr = val & 0xffff;
+ attrs.requester_id = cs->cpu_index;
+ return send_ipi_data(ipi, cs, val, addr, attrs);
+}
+
+MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size, MemTxAttrs attrs)
+{
+ IPICore *s = opaque;
+ LoongsonIPICommonState *ipi = s->ipi;
+ LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
+ int index = 0;
+ uint32_t cpuid;
+ uint8_t vector;
+ CPUState *cs;
+
+ addr &= 0xff;
+ trace_loongson_ipi_write(size, (uint64_t)addr, val);
+ switch (addr) {
+ case CORE_STATUS_OFF:
+ qemu_log_mask(LOG_GUEST_ERROR, "can not be written");
+ break;
+ case CORE_EN_OFF:
+ s->en = val;
+ break;
+ case CORE_SET_OFF:
+ s->status |= val;
+ if (s->status != 0 && (s->status & s->en) != 0) {
+ qemu_irq_raise(s->irq);
+ }
+ break;
+ case CORE_CLEAR_OFF:
+ s->status &= ~val;
+ if (s->status == 0 && s->en != 0) {
+ qemu_irq_lower(s->irq);
+ }
+ break;
+ case CORE_BUF_20 ... CORE_BUF_38 + 4:
+ index = (addr - CORE_BUF_20) >> 2;
+ s->buf[index] = val;
+ break;
+ case IOCSR_IPI_SEND:
+ cpuid = extract32(val, 16, 10);
+ /* IPI status vector */
+ vector = extract8(val, 0, 5);
+ cs = licc->cpu_by_arch_id(cpuid);
+ if (cs == NULL || cs->cpu_index >= ipi->num_cpu) {
+ return MEMTX_DECODE_ERROR;
+ }
+ loongson_ipi_core_writel(&ipi->cpu[cs->cpu_index], CORE_SET_OFF,
+ BIT(vector), 4, attrs);
+ break;
+ default:
+ qemu_log_mask(LOG_UNIMP, "invalid write: %x", (uint32_t)addr);
+ break;
+ }
+
+ return MEMTX_OK;
+}
+
+static MemTxResult loongson_ipi_iocsr_writel(void *opaque, hwaddr addr,
+ uint64_t val, unsigned size,
+ MemTxAttrs attrs)
+{
+ LoongsonIPICommonState *ipi = opaque;
+ IPICore *s;
+
+ if (attrs.requester_id >= ipi->num_cpu) {
+ return MEMTX_DECODE_ERROR;
+ }
+
+ s = &ipi->cpu[attrs.requester_id];
+ return loongson_ipi_core_writel(s, addr, val, size, attrs);
+}
+
+static const MemoryRegionOps loongson_ipi_iocsr_ops = {
+ .read_with_attrs = loongson_ipi_iocsr_readl,
+ .write_with_attrs = loongson_ipi_iocsr_writel,
+ .impl.min_access_size = 4,
+ .impl.max_access_size = 4,
+ .valid.min_access_size = 4,
+ .valid.max_access_size = 8,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+/* mail send and any send only support writeq */
+static MemTxResult loongson_ipi_writeq(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size, MemTxAttrs attrs)
+{
+ LoongsonIPICommonState *ipi = opaque;
+ MemTxResult ret = MEMTX_OK;
+
+ addr &= 0xfff;
+ switch (addr) {
+ case MAIL_SEND_OFFSET:
+ ret = mail_send(ipi, val, attrs);
+ break;
+ case ANY_SEND_OFFSET:
+ ret = any_send(ipi, val, attrs);
+ break;
+ default:
+ break;
+ }
+
+ return ret;
+}
+
+static const MemoryRegionOps loongson_ipi64_ops = {
+ .write_with_attrs = loongson_ipi_writeq,
+ .impl.min_access_size = 8,
+ .impl.max_access_size = 8,
+ .valid.min_access_size = 8,
+ .valid.max_access_size = 8,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static void loongson_ipi_common_realize(DeviceState *dev, Error **errp)
+{
+ LoongsonIPICommonState *s = LOONGSON_IPI_COMMON(dev);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+ int i;
+
+ if (s->num_cpu == 0) {
+ error_setg(errp, "num-cpu must be at least 1");
+ return;
+ }
+
+ memory_region_init_io(&s->ipi_iocsr_mem, OBJECT(dev),
+ &loongson_ipi_iocsr_ops,
+ s, "loongson_ipi_iocsr", 0x48);
+
+ /* loongson_ipi_iocsr performs re-entrant IO through ipi_send */
+ s->ipi_iocsr_mem.disable_reentrancy_guard = true;
+
+ sysbus_init_mmio(sbd, &s->ipi_iocsr_mem);
+
+ memory_region_init_io(&s->ipi64_iocsr_mem, OBJECT(dev),
+ &loongson_ipi64_ops,
+ s, "loongson_ipi64_iocsr", 0x118);
+ sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem);
+
+ s->cpu = g_new0(IPICore, s->num_cpu);
+ for (i = 0; i < s->num_cpu; i++) {
+ s->cpu[i].ipi = s;
+
+ qdev_init_gpio_out(dev, &s->cpu[i].irq, 1);
+ }
+}
static void loongson_ipi_common_finalize(Object *obj)
{
@@ -53,6 +324,7 @@ static void loongson_ipi_common_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->realize = loongson_ipi_common_realize;
device_class_set_props(dc, ipi_properties);
dc->vmsd = &vmstate_loongson_ipi;
}
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 14/17] hw/intc/loongarch_ipi: Add loongarch IPI support
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (12 preceding siblings ...)
2024-07-17 21:47 ` [PATCH v3 13/17] hw/intc/loongson_ipi: Move common code to loongson_ipi_common.c Philippe Mathieu-Daudé
@ 2024-07-17 21:47 ` Philippe Mathieu-Daudé
2024-07-17 21:47 ` [PATCH v3 15/17] hw/loongarch/virt: Replace loongson IPI with loongarch IPI Philippe Mathieu-Daudé
` (2 subsequent siblings)
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:47 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
Loongarch IPI is added here, it inherits from class
TYPE_LOONGSON_IPI_COMMON, and two interfaces get_iocsr_as() and
cpu_by_arch_id() are added for Loongarch 3A5000 machine. It can
be used when ipi is emulated in userspace with KVM mode.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Rebased and simplified]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/intc/loongarch_ipi.h | 25 ++++++++++++
hw/intc/loongarch_ipi.c | 71 +++++++++++++++++++++++++++++++++
hw/intc/Kconfig | 4 ++
hw/intc/meson.build | 1 +
4 files changed, 101 insertions(+)
create mode 100644 include/hw/intc/loongarch_ipi.h
create mode 100644 hw/intc/loongarch_ipi.c
diff --git a/include/hw/intc/loongarch_ipi.h b/include/hw/intc/loongarch_ipi.h
new file mode 100644
index 0000000000..d134c9d0c7
--- /dev/null
+++ b/include/hw/intc/loongarch_ipi.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Loongarch ipi interrupt header files
+ *
+ * Copyright (C) 2024 Loongson Technology Corporation Limited
+ */
+
+#ifndef HW_LOONGARCH_IPI_H
+#define HW_LOONGARCH_IPI_H
+
+#include "qom/object.h"
+#include "hw/intc/loongson_ipi_common.h"
+
+#define TYPE_LOONGARCH_IPI "loongarch_ipi"
+OBJECT_DECLARE_TYPE(LoongarchIPIState, LoongarchIPIClass, LOONGARCH_IPI)
+
+struct LoongarchIPIState {
+ LoongsonIPICommonState parent_obj;
+};
+
+struct LoongarchIPIClass {
+ LoongsonIPICommonClass parent_class;
+};
+
+#endif
diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c
new file mode 100644
index 0000000000..277de7c4e4
--- /dev/null
+++ b/hw/intc/loongarch_ipi.c
@@ -0,0 +1,71 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Loongarch ipi interrupt support
+ *
+ * Copyright (C) 2024 Loongson Technology Corporation Limited
+ */
+
+#include "qemu/osdep.h"
+#include "hw/boards.h"
+#include "hw/intc/loongarch_ipi.h"
+#include "target/loongarch/cpu.h"
+
+static AddressSpace *get_iocsr_as(CPUState *cpu)
+{
+ return LOONGARCH_CPU(cpu)->env.address_space_iocsr;
+}
+
+static int archid_cmp(const void *a, const void *b)
+{
+ CPUArchId *archid_a = (CPUArchId *)a;
+ CPUArchId *archid_b = (CPUArchId *)b;
+
+ return archid_a->arch_id - archid_b->arch_id;
+}
+
+static CPUArchId *find_cpu_by_archid(MachineState *ms, uint32_t id)
+{
+ CPUArchId apic_id, *found_cpu;
+
+ apic_id.arch_id = id;
+ found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus,
+ ms->possible_cpus->len,
+ sizeof(*ms->possible_cpus->cpus),
+ archid_cmp);
+
+ return found_cpu;
+}
+
+static CPUState *loongarch_cpu_by_arch_id(int64_t arch_id)
+{
+ MachineState *machine = MACHINE(qdev_get_machine());
+ CPUArchId *archid;
+
+ archid = find_cpu_by_archid(machine, arch_id);
+ if (archid) {
+ return CPU(archid->cpu);
+ }
+
+ return NULL;
+}
+
+static void loongarch_ipi_class_init(ObjectClass *klass, void *data)
+{
+ LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass);
+
+ licc->get_iocsr_as = get_iocsr_as;
+ licc->cpu_by_arch_id = loongarch_cpu_by_arch_id;
+}
+
+static const TypeInfo loongarch_ipi_info = {
+ .name = TYPE_LOONGARCH_IPI,
+ .parent = TYPE_LOONGSON_IPI_COMMON,
+ .class_init = loongarch_ipi_class_init,
+};
+
+static void loongarch_ipi_register_types(void)
+{
+ type_register_static(&loongarch_ipi_info);
+}
+
+type_init(loongarch_ipi_register_types)
diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig
index a2a0fdca85..dd405bdb5d 100644
--- a/hw/intc/Kconfig
+++ b/hw/intc/Kconfig
@@ -94,6 +94,10 @@ config LOONGSON_IPI
bool
select LOONGSON_IPI_COMMON
+config LOONGARCH_IPI
+ bool
+ select LOONGSON_IPI_COMMON
+
config LOONGARCH_PCH_PIC
bool
select UNIMP
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
index a09a527207..f4d81eb8e4 100644
--- a/hw/intc/meson.build
+++ b/hw/intc/meson.build
@@ -71,6 +71,7 @@ specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'],
specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c'))
specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c'))
specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c'))
+specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c'))
specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c'))
specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c'))
specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c'))
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 15/17] hw/loongarch/virt: Replace loongson IPI with loongarch IPI
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (13 preceding siblings ...)
2024-07-17 21:47 ` [PATCH v3 14/17] hw/intc/loongarch_ipi: Add loongarch IPI support Philippe Mathieu-Daudé
@ 2024-07-17 21:47 ` Philippe Mathieu-Daudé
2024-07-17 21:47 ` [PATCH v3 16/17] hw/intc/loongson_ipi: Restrict to MIPS Philippe Mathieu-Daudé
2024-07-17 21:47 ` [PATCH v3 17/17] hw/intc/loongson_ipi: Remove unused headers Philippe Mathieu-Daudé
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:47 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
Loongarch IPI inherits from class LoongsonIPICommonClass, and it
only contains Loongarch 3A5000 virt machine specific interfaces,
rather than mix different machine implementations together.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Rebased]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/loongarch/virt.h | 1 -
hw/loongarch/virt.c | 4 ++--
hw/loongarch/Kconfig | 2 +-
3 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index 8fdfacf268..91216418c8 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -11,7 +11,6 @@
#include "target/loongarch/cpu.h"
#include "hw/boards.h"
#include "qemu/queue.h"
-#include "hw/intc/loongson_ipi.h"
#include "hw/block/flash.h"
#include "hw/loongarch/boot.h"
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index e592b1b6b7..29040422aa 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -23,7 +23,7 @@
#include "net/net.h"
#include "hw/loader.h"
#include "elf.h"
-#include "hw/intc/loongson_ipi.h"
+#include "hw/intc/loongarch_ipi.h"
#include "hw/intc/loongarch_extioi.h"
#include "hw/intc/loongarch_pch_pic.h"
#include "hw/intc/loongarch_pch_msi.h"
@@ -788,7 +788,7 @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
*/
/* Create IPI device */
- ipi = qdev_new(TYPE_LOONGSON_IPI);
+ ipi = qdev_new(TYPE_LOONGARCH_IPI);
qdev_prop_set_uint32(ipi, "num-cpu", ms->smp.cpus);
sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal);
diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
index 89be737726..0de713a439 100644
--- a/hw/loongarch/Kconfig
+++ b/hw/loongarch/Kconfig
@@ -12,7 +12,7 @@ config LOONGARCH_VIRT
select SERIAL
select VIRTIO_PCI
select PLATFORM_BUS
- select LOONGSON_IPI
+ select LOONGARCH_IPI
select LOONGARCH_PCH_PIC
select LOONGARCH_PCH_MSI
select LOONGARCH_EXTIOI
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 16/17] hw/intc/loongson_ipi: Restrict to MIPS
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (14 preceding siblings ...)
2024-07-17 21:47 ` [PATCH v3 15/17] hw/loongarch/virt: Replace loongson IPI with loongarch IPI Philippe Mathieu-Daudé
@ 2024-07-17 21:47 ` Philippe Mathieu-Daudé
2024-07-17 21:47 ` [PATCH v3 17/17] hw/intc/loongson_ipi: Remove unused headers Philippe Mathieu-Daudé
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:47 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
From: Bibo Mao <maobibo@loongson.cn>
Now than LoongArch target can use the TYPE_LOONGARCH_IPI
model, restrict TYPE_LOONGSON_IPI to MIPS.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/intc/loongson_ipi.c | 14 --------------
1 file changed, 14 deletions(-)
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index 464bb6b580..61375d89ff 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -16,22 +16,9 @@
#include "exec/address-spaces.h"
#include "exec/memory.h"
#include "migration/vmstate.h"
-#ifdef TARGET_LOONGARCH64
-#include "target/loongarch/cpu.h"
-#endif
-#ifdef TARGET_MIPS
#include "target/mips/cpu.h"
-#endif
#include "trace.h"
-#ifdef TARGET_LOONGARCH64
-static AddressSpace *get_iocsr_as(CPUState *cpu)
-{
- return LOONGARCH_CPU(cpu)->env.address_space_iocsr;
-}
-#endif
-
-#ifdef TARGET_MIPS
static AddressSpace *get_iocsr_as(CPUState *cpu)
{
if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) {
@@ -40,7 +27,6 @@ static AddressSpace *get_iocsr_as(CPUState *cpu)
return NULL;
}
-#endif
static const MemoryRegionOps loongson_ipi_core_ops = {
.read_with_attrs = loongson_ipi_core_readl,
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 17/17] hw/intc/loongson_ipi: Remove unused headers
2024-07-17 21:46 [PATCH v3 00/17] Reconstruct loongson ipi driver Philippe Mathieu-Daudé
` (15 preceding siblings ...)
2024-07-17 21:47 ` [PATCH v3 16/17] hw/intc/loongson_ipi: Restrict to MIPS Philippe Mathieu-Daudé
@ 2024-07-17 21:47 ` Philippe Mathieu-Daudé
16 siblings, 0 replies; 20+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-07-17 21:47 UTC (permalink / raw)
To: Bibo Mao, Jiaxun Yang, qemu-devel
Cc: Xianglai Li, Paolo Bonzini, Huacai Chen, Xiaojuan Yang,
Philippe Mathieu-Daudé, Song Gao
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/intc/loongson_ipi.c | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c
index 61375d89ff..6dd08aa9cb 100644
--- a/hw/intc/loongson_ipi.c
+++ b/hw/intc/loongson_ipi.c
@@ -6,18 +6,9 @@
*/
#include "qemu/osdep.h"
-#include "hw/boards.h"
-#include "hw/sysbus.h"
#include "hw/intc/loongson_ipi.h"
-#include "hw/irq.h"
-#include "hw/qdev-properties.h"
#include "qapi/error.h"
-#include "qemu/log.h"
-#include "exec/address-spaces.h"
-#include "exec/memory.h"
-#include "migration/vmstate.h"
#include "target/mips/cpu.h"
-#include "trace.h"
static AddressSpace *get_iocsr_as(CPUState *cpu)
{
--
2.41.0
^ permalink raw reply related [flat|nested] 20+ messages in thread