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From: Zhenzhong Duan <zhenzhong.duan@intel.com>
To: qemu-devel@nongnu.org
Cc: alex.williamson@redhat.com, clg@redhat.com,
	eric.auger@redhat.com, mst@redhat.com, peterx@redhat.com,
	jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,
	joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com,
	kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com,
	Zhenzhong Duan <zhenzhong.duan@intel.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Eduardo Habkost <eduardo@habkost.net>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Subject: [PATCH v1 02/17] intel_iommu: Make pasid entry type check accurate
Date: Thu, 18 Jul 2024 16:16:21 +0800	[thread overview]
Message-ID: <20240718081636.879544-3-zhenzhong.duan@intel.com> (raw)
In-Reply-To: <20240718081636.879544-1-zhenzhong.duan@intel.com>

When guest configures Nested Translation(011b) or First-stage Translation only
(001b), type check passed unaccurately.

Fails the type check in those cases as their simulation isn't supported yet.

Fixes: fb43cf739e1 ("intel_iommu: scalable mode emulation")
Suggested-by: Yi Liu <yi.l.liu@intel.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
---
 hw/i386/intel_iommu.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index e65f5b29a5..1cff8b00ae 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -759,20 +759,16 @@ static inline bool vtd_pe_type_check(X86IOMMUState *x86_iommu,
                                      VTDPASIDEntry *pe)
 {
     switch (VTD_PE_GET_TYPE(pe)) {
-    case VTD_SM_PASID_ENTRY_FLT:
     case VTD_SM_PASID_ENTRY_SLT:
-    case VTD_SM_PASID_ENTRY_NESTED:
-        break;
+        return true;
     case VTD_SM_PASID_ENTRY_PT:
-        if (!x86_iommu->pt_supported) {
-            return false;
-        }
-        break;
+        return x86_iommu->pt_supported;
+    case VTD_SM_PASID_ENTRY_FLT:
+    case VTD_SM_PASID_ENTRY_NESTED:
     default:
         /* Unknown type */
         return false;
     }
-    return true;
 }
 
 static inline bool vtd_pdire_present(VTDPASIDDirEntry *pdire)
-- 
2.34.1



  parent reply	other threads:[~2024-07-18  8:21 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-18  8:16 [PATCH v1 00/17] intel_iommu: Enable stage-1 translation for emulated device Zhenzhong Duan
2024-07-18  8:16 ` [PATCH v1 01/17] intel_iommu: Use the latest fault reasons defined by spec Zhenzhong Duan
2024-07-23  7:12   ` CLEMENT MATHIEU--DRIF
2024-07-29  7:39   ` Yi Liu
2024-07-29  8:42     ` Michael S. Tsirkin
2024-07-29  9:39       ` Yi Liu
2024-07-18  8:16 ` Zhenzhong Duan [this message]
2024-07-18  9:06   ` [PATCH v1 02/17] intel_iommu: Make pasid entry type check accurate CLEMENT MATHIEU--DRIF
2024-07-18  8:16 ` [PATCH v1 03/17] intel_iommu: Add a placeholder variable for scalable modern mode Zhenzhong Duan
2024-07-18  9:02   ` CLEMENT MATHIEU--DRIF
2024-07-19  2:47     ` Duan, Zhenzhong
2024-07-19  3:22       ` Yi Liu
2024-07-19  3:37         ` Duan, Zhenzhong
2024-07-19  3:39           ` Duan, Zhenzhong
2024-07-19  4:26             ` CLEMENT MATHIEU--DRIF
2024-07-23  7:12             ` CLEMENT MATHIEU--DRIF
2024-07-23  8:50               ` Duan, Zhenzhong
2024-07-19  4:21       ` CLEMENT MATHIEU--DRIF
2024-07-18  8:16 ` [PATCH v1 04/17] intel_iommu: Flush stage-2 cache in PADID-selective PASID-based iotlb invalidation Zhenzhong Duan
2024-07-23 16:02   ` CLEMENT MATHIEU--DRIF
2024-07-24  2:59     ` Duan, Zhenzhong
2024-07-24  5:16       ` CLEMENT MATHIEU--DRIF
2024-07-24  5:19         ` Duan, Zhenzhong
2024-07-18  8:16 ` [PATCH v1 05/17] intel_iommu: Rename slpte to pte Zhenzhong Duan
2024-07-18  8:16 ` [PATCH v1 06/17] intel_iommu: Implement stage-1 translation Zhenzhong Duan
2024-07-18  8:16 ` [PATCH v1 07/17] intel_iommu: Check if the input address is canonical Zhenzhong Duan
2024-07-18  8:16 ` [PATCH v1 08/17] intel_iommu: Set accessed and dirty bits during first stage translation Zhenzhong Duan
2024-07-18  8:16 ` [PATCH v1 09/17] intel_iommu: Flush stage-1 cache in iotlb invalidation Zhenzhong Duan
2024-07-23  7:12   ` CLEMENT MATHIEU--DRIF
2024-07-18  8:16 ` [PATCH v1 10/17] intel_iommu: Process PASID-based " Zhenzhong Duan
2024-07-23 16:18   ` CLEMENT MATHIEU--DRIF
2024-07-18  8:16 ` [PATCH v1 11/17] intel_iommu: Extract device IOTLB invalidation logic Zhenzhong Duan
2024-07-24  8:35   ` CLEMENT MATHIEU--DRIF
2024-07-24  8:42     ` Duan, Zhenzhong
2024-07-18  8:16 ` [PATCH v1 12/17] intel_iommu: Add an internal API to find an address space with PASID Zhenzhong Duan
2024-07-18  8:16 ` [PATCH v1 13/17] intel_iommu: Add support for PASID-based device IOTLB invalidation Zhenzhong Duan
2024-07-18  8:16 ` [PATCH v1 14/17] intel_iommu: piotlb invalidation should notify unmap Zhenzhong Duan
2024-07-24  5:45   ` CLEMENT MATHIEU--DRIF
2024-07-24  6:04     ` CLEMENT MATHIEU--DRIF
2024-07-24  6:07       ` Duan, Zhenzhong
2024-07-24  6:11         ` CLEMENT MATHIEU--DRIF
2024-07-18  8:16 ` [PATCH v1 15/17] intel_iommu: Set default aw_bits to 48 in scalable modren mode Zhenzhong Duan
2024-07-18  9:14   ` CLEMENT MATHIEU--DRIF
2024-07-18  8:16 ` [PATCH v1 16/17] intel_iommu: Modify x-scalable-mode to be string option Zhenzhong Duan
2024-07-18  9:25   ` CLEMENT MATHIEU--DRIF
2024-07-19  2:53     ` Duan, Zhenzhong
2024-07-19  4:23       ` CLEMENT MATHIEU--DRIF
2024-07-18  8:16 ` [PATCH v1 17/17] tests/qtest: Add intel-iommu test Zhenzhong Duan
2024-07-24  5:58   ` CLEMENT MATHIEU--DRIF
2024-07-24  6:14     ` Duan, Zhenzhong

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