From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
qemu-arm@nongnu.org,
"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
"Tong Ho" <tong.ho@amd.com>,
"Manos Pitsidianakis" <manos.pitsidianakis@linaro.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PATCH v5 10/16] hw/char/pl011: Check if receiver is enabled
Date: Fri, 19 Jul 2024 20:10:35 +0200 [thread overview]
Message-ID: <20240719181041.49545-11-philmd@linaro.org> (raw)
In-Reply-To: <20240719181041.49545-1-philmd@linaro.org>
Do not receive characters when UART or receiver are disabled.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/char/pl011.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index c76283dccf..0ce91c13d3 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -85,6 +85,7 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr)
#define CR_OUT1 (1 << 12)
#define CR_RTS (1 << 11)
#define CR_DTR (1 << 10)
+#define CR_RXE (1 << 9)
#define CR_TXE (1 << 8)
#define CR_LBE (1 << 7)
#define CR_UARTEN (1 << 0)
@@ -481,9 +482,11 @@ static void pl011_write(void *opaque, hwaddr offset,
static int pl011_can_receive(void *opaque)
{
PL011State *s = (PL011State *)opaque;
- int r;
+ int r = 0;
- r = s->read_count < pl011_get_fifo_depth(s);
+ if ((s->cr & CR_UARTEN) && (s->cr & CR_RXE)) {
+ r = s->read_count < pl011_get_fifo_depth(s);
+ }
trace_pl011_can_receive(s->lcr, s->read_count, r);
return r;
}
--
2.41.0
next prev parent reply other threads:[~2024-07-19 18:12 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-19 18:10 [PATCH v5 00/16] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
2024-07-19 18:10 ` [PATCH v5 01/16] tests/avocado: Add 'device:pl011' tag to tests exercising PL011 UART Philippe Mathieu-Daudé
2024-07-19 18:10 ` [PATCH v5 02/16] hw/char/pl011: Remove unused 'readbuff' field Philippe Mathieu-Daudé
2024-07-29 15:39 ` Peter Maydell
2024-07-19 18:10 ` [PATCH v5 03/16] hw/char/pl011: Move pl011_put_fifo() earlier Philippe Mathieu-Daudé
2024-07-29 15:39 ` Peter Maydell
2024-07-19 18:10 ` [PATCH v5 04/16] hw/char/pl011: Move pl011_loopback_enabled|tx() around Philippe Mathieu-Daudé
2024-07-29 15:40 ` Peter Maydell
2024-07-19 18:10 ` [PATCH v5 05/16] hw/char/pl011: Split RX/TX path of pl011_reset_fifo() Philippe Mathieu-Daudé
2024-07-19 18:10 ` [PATCH v5 06/16] hw/char/pl011: Extract pl011_write_txdata() from pl011_write() Philippe Mathieu-Daudé
2024-07-19 18:10 ` [PATCH v5 07/16] hw/char/pl011: Extract pl011_read_rxdata() from pl011_read() Philippe Mathieu-Daudé
2024-07-19 18:10 ` [PATCH v5 08/16] hw/char/pl011: Warn when using disabled transmitter Philippe Mathieu-Daudé
2024-07-19 18:10 ` [PATCH v5 09/16] tests/qtest: Update tests using PL011 UART Philippe Mathieu-Daudé
2024-07-29 15:47 ` Peter Maydell
2024-12-30 15:17 ` Philippe Mathieu-Daudé
2024-07-19 18:10 ` Philippe Mathieu-Daudé [this message]
2024-07-29 15:51 ` [PATCH v5 10/16] hw/char/pl011: Check if receiver is enabled Peter Maydell
2025-01-02 15:45 ` Philippe Mathieu-Daudé
2024-07-19 18:10 ` [PATCH v5 11/16] hw/char/pl011: Rename RX FIFO methods Philippe Mathieu-Daudé
2024-07-19 18:10 ` [PATCH v5 12/16] hw/char/pl011: Add transmit FIFO to PL011State Philippe Mathieu-Daudé
2024-07-19 18:10 ` [PATCH v5 13/16] hw/char/pl011: Introduce pl011_xmit() as GSource Philippe Mathieu-Daudé
2024-07-19 18:10 ` [PATCH v5 14/16] hw/char/pl011: Consider TX FIFO overrun error Philippe Mathieu-Daudé
2024-07-19 18:10 ` [PATCH v5 15/16] hw/char/pl011: Drain TX FIFO when no backend connected Philippe Mathieu-Daudé
2024-07-19 18:10 ` [RFC PATCH v5 16/16] hw/char/pl011: Implement TX FIFO Philippe Mathieu-Daudé
2024-07-19 21:25 ` Mark Cave-Ayland
2024-07-22 11:47 ` Philippe Mathieu-Daudé
2024-09-07 5:42 ` [PATCH v5 00/16] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
2024-09-07 10:38 ` Peter Maydell
2024-09-09 13:27 ` Philippe Mathieu-Daudé
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