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[5.90.113.158]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d68fa171sm66691695e9.1.2024.07.20.12.04.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jul 2024 12:04:58 -0700 (PDT) Date: Sat, 20 Jul 2024 15:04:55 -0400 From: "Michael S. Tsirkin" To: CLEMENT MATHIEU--DRIF Cc: Yuke Peng , qemu-devel , Peter Xu , Jason Wang , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: Re: [PATCH v2] hw/i386/intel_iommu: Block CFI when necessary Message-ID: <20240720150438-mutt-send-email-mst@kernel.org> References: <20240708100816.1916346-1-pykfirst@gmail.com> <468ed4a0-14b1-4d0b-9537-9a550b14f0da@eviden.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <468ed4a0-14b1-4d0b-9537-9a550b14f0da@eviden.com> Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, Jul 09, 2024 at 04:43:25AM +0000, CLEMENT MATHIEU--DRIF wrote: > Hi > > On 08/07/2024 12:08, Yuke Peng wrote: > > Caution: External email. Do not open attachments or click links, unless this email comes from a known sender and you know the content is safe. > > > > > > According to Intel VT-d specification 5.1.4, CFI must be blocked when > > Extended Interrupt Mode is enabled or Compatibility format interrupts > > are disabled. > > > > Signed-off-by: Yuke Peng > > --- > > Changes in v2: > > - Use subsections for the cfi_enabled field. > > - Link to v1: https://lore.kernel.org/qemu-devel/20240625112819.862282-1-pykfirst@gmail.com/ > > > > --- > > hw/i386/intel_iommu.c | 53 +++++++++++++++++++++++++++++++++-- > > hw/i386/trace-events | 1 + > > include/hw/i386/intel_iommu.h | 1 + > > 3 files changed, 53 insertions(+), 2 deletions(-) > > > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > > index 5085a6fee3..af9c864bde 100644 > > --- a/hw/i386/intel_iommu.c > > +++ b/hw/i386/intel_iommu.c > > @@ -2410,6 +2410,22 @@ static void vtd_handle_gcmd_ire(IntelIOMMUState *s, bool en) > > } > > } > > > > +/* Handle Compatibility Format Interrupts Enable/Disable */ > > +static void vtd_handle_gcmd_cfi(IntelIOMMUState *s, bool en) > > +{ > > + trace_vtd_cfi_enable(en); > > + > > + if (en) { > > + s->cfi_enabled = true; > > + /* Ok - report back to driver */ > > + vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_CFIS); > > + } else { > > + s->cfi_enabled = false; > > + /* Ok - report back to driver */ > > + vtd_set_clear_mask_long(s, DMAR_GSTS_REG, VTD_GSTS_CFIS, 0); > > + } > > +} > > + > > /* Handle write to Global Command Register */ > > static void vtd_handle_gcmd_write(IntelIOMMUState *s) > > { > > @@ -2440,6 +2456,10 @@ static void vtd_handle_gcmd_write(IntelIOMMUState *s) > > /* Interrupt remap enable/disable */ > > vtd_handle_gcmd_ire(s, val & VTD_GCMD_IRE); > > } > > + if (changed & VTD_GCMD_CFI) { > > + /* Compatibility format interrupts enable/disable */ > > + vtd_handle_gcmd_cfi(s, val & VTD_GCMD_CFI); > > + } > > } > > > > /* Handle write to Context Command Register */ > > @@ -3283,7 +3303,25 @@ static int vtd_post_load(void *opaque, int version_id) > > return 0; > > } > > > > -static const VMStateDescription vtd_vmstate = { > > +static bool vtd_cfi_needed(void *opaque) > > +{ > > + IntelIOMMUState *iommu = opaque; > > + > > + return iommu->intr_enabled && !iommu->intr_eime; > > +} > > + > > +static const VMStateDescription vmstate_vtd_cfi = { > > + .name = "iommu-intel/cfi", > > + .version_id = 1, > > + .minimum_version_id = 1, > > + .needed = vtd_cfi_needed, > > + .fields = (VMStateField[]) { > > + VMSTATE_BOOL(cfi_enabled, IntelIOMMUState), > > + VMSTATE_END_OF_LIST() > > + } > > +}; > > + > > +static const VMStateDescription vmstate_vtd = { > Why is vtd_vmstate renamed to vmstate_vtd? is it necessary? Yuke Peng, do you plan to answer this? > > .name = "iommu-intel", > > .version_id = 1, > > .minimum_version_id = 1, > > @@ -3306,6 +3344,10 @@ static const VMStateDescription vtd_vmstate = { > > VMSTATE_BOOL(intr_enabled, IntelIOMMUState), > > VMSTATE_BOOL(intr_eime, IntelIOMMUState), > > VMSTATE_END_OF_LIST() > > + }, > > + .subsections = (const VMStateDescription * []) { > > + &vmstate_vtd_cfi, > > + NULL > > } > > }; > > > > @@ -3525,6 +3567,12 @@ static int vtd_interrupt_remap_msi(IntelIOMMUState *iommu, > > > > /* This is compatible mode. */ > > if (addr.addr.int_mode != VTD_IR_INT_FORMAT_REMAP) { > > + if (iommu->intr_eime || !iommu->cfi_enabled) { > > + if (do_fault) { > > + vtd_report_ir_fault(iommu, sid, VTD_FR_IR_REQ_COMPAT, 0); > > + } > > + return -EINVAL; > > + } > > memcpy(translated, origin, sizeof(*origin)); > > goto out; > > } > > @@ -3950,6 +3998,7 @@ static void vtd_init(IntelIOMMUState *s) > > s->root_scalable = false; > > s->dmar_enabled = false; > > s->intr_enabled = false; > > + s->cfi_enabled = false; > > s->iq_head = 0; > > s->iq_tail = 0; > > s->iq = 0; > > @@ -4243,7 +4292,7 @@ static void vtd_class_init(ObjectClass *klass, void *data) > > X86IOMMUClass *x86_class = X86_IOMMU_DEVICE_CLASS(klass); > > > > dc->reset = vtd_reset; > > - dc->vmsd = &vtd_vmstate; > > + dc->vmsd = &vmstate_vtd; > > device_class_set_props(dc, vtd_properties); > > dc->hotpluggable = false; > > x86_class->realize = vtd_realize; > > diff --git a/hw/i386/trace-events b/hw/i386/trace-events > > index 53c02d7ac8..ffd87db65f 100644 > > --- a/hw/i386/trace-events > > +++ b/hw/i386/trace-events > > @@ -57,6 +57,7 @@ vtd_dmar_translate(uint8_t bus, uint8_t slot, uint8_t func, uint64_t iova, uint6 > > vtd_dmar_enable(bool en) "enable %d" > > vtd_dmar_fault(uint16_t sid, int fault, uint64_t addr, bool is_write) "sid 0x%"PRIx16" fault %d addr 0x%"PRIx64" write %d" > > vtd_ir_enable(bool en) "enable %d" > > +vtd_cfi_enable(bool en) "enable %d" > > vtd_ir_irte_get(int index, uint64_t lo, uint64_t hi) "index %d low 0x%"PRIx64" high 0x%"PRIx64 > > vtd_ir_remap(int index, int tri, int vec, int deliver, uint32_t dest, int dest_mode) "index %d trigger %d vector %d deliver %d dest 0x%"PRIx32" mode %d" > > vtd_ir_remap_type(const char *type) "%s" > > diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h > > index 7fa0a695c8..38e20d0f2c 100644 > > --- a/include/hw/i386/intel_iommu.h > > +++ b/include/hw/i386/intel_iommu.h > > @@ -294,6 +294,7 @@ struct IntelIOMMUState { > > > > /* interrupt remapping */ > > bool intr_enabled; /* Whether guest enabled IR */ > > + bool cfi_enabled; /* Whether CFI is enabled */ > > dma_addr_t intr_root; /* Interrupt remapping table pointer */ > > uint32_t intr_size; /* Number of IR table entries */ > > bool intr_eime; /* Extended interrupt mode enabled */ > > -- > > 2.34.1 > > > >