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From: Michael Kowal <kowal@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com,
	npiggin@gmail.com, milesg@linux.ibm.com
Subject: [PATCH v4 09/11] pnv/xive2: Move xive2_nvp_pic_print_info() to xive2.c
Date: Wed, 24 Jul 2024 16:21:28 -0500	[thread overview]
Message-ID: <20240724212130.26811-10-kowal@linux.ibm.com> (raw)
In-Reply-To: <20240724212130.26811-1-kowal@linux.ibm.com>

From: Frederic Barrat <fbarrat@linux.ibm.com>

Moving xive2_nvp_pic_print_info() to align with the other "pic_print_info"
functions.

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Michael Kowal <kowal@linux.vnet.ibm.com>
---
 include/hw/ppc/xive2_regs.h |  2 ++
 hw/intc/pnv_xive2.c         | 27 ---------------------------
 hw/intc/xive2.c             | 26 ++++++++++++++++++++++++++
 3 files changed, 28 insertions(+), 27 deletions(-)

diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h
index 4e5e17cd89..ec5d6ec2d6 100644
--- a/include/hw/ppc/xive2_regs.h
+++ b/include/hw/ppc/xive2_regs.h
@@ -194,6 +194,8 @@ static inline uint32_t xive2_nvp_blk(uint32_t cam_line)
     return (cam_line >> XIVE2_NVP_SHIFT) & 0xf;
 }
 
+void xive2_nvp_pic_print_info(Xive2Nvp *nvp, uint32_t nvp_idx, GString *buf);
+
 /*
  * Notification Virtual Group or Crowd (NVG/NVC)
  */
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index 9fe3ec9a67..4740c56347 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -2436,33 +2436,6 @@ static void pnv_xive2_register_types(void)
 
 type_init(pnv_xive2_register_types)
 
-static void xive2_nvp_pic_print_info(Xive2Nvp *nvp, uint32_t nvp_idx,
-                                     GString *buf)
-{
-    uint8_t  eq_blk = xive_get_field32(NVP2_W5_VP_END_BLOCK, nvp->w5);
-    uint32_t eq_idx = xive_get_field32(NVP2_W5_VP_END_INDEX, nvp->w5);
-
-    if (!xive2_nvp_is_valid(nvp)) {
-        return;
-    }
-
-    g_string_append_printf(buf, "  %08x end:%02x/%04x IPB:%02x",
-                           nvp_idx, eq_blk, eq_idx,
-                           xive_get_field32(NVP2_W2_IPB, nvp->w2));
-    /*
-     * When the NVP is HW controlled, more fields are updated
-     */
-    if (xive2_nvp_is_hw(nvp)) {
-        g_string_append_printf(buf, " CPPR:%02x",
-                               xive_get_field32(NVP2_W2_CPPR, nvp->w2));
-        if (xive2_nvp_is_co(nvp)) {
-            g_string_append_printf(buf, " CO:%04x",
-                                   xive_get_field32(NVP2_W1_CO_THRID, nvp->w1));
-        }
-    }
-    g_string_append_c(buf, '\n');
-}
-
 /*
  * If the table is direct, we can compute the number of PQ entries
  * provisioned by FW.
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index 3e7238c663..ac914b3d1c 100644
--- a/hw/intc/xive2.c
+++ b/hw/intc/xive2.c
@@ -137,6 +137,32 @@ void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t end_idx,
                            (uint32_t) xive_get_field64(EAS2_END_DATA, eas->w));
 }
 
+void xive2_nvp_pic_print_info(Xive2Nvp *nvp, uint32_t nvp_idx, GString *buf)
+{
+    uint8_t  eq_blk = xive_get_field32(NVP2_W5_VP_END_BLOCK, nvp->w5);
+    uint32_t eq_idx = xive_get_field32(NVP2_W5_VP_END_INDEX, nvp->w5);
+
+    if (!xive2_nvp_is_valid(nvp)) {
+        return;
+    }
+
+    g_string_append_printf(buf, "  %08x end:%02x/%04x IPB:%02x",
+                           nvp_idx, eq_blk, eq_idx,
+                           xive_get_field32(NVP2_W2_IPB, nvp->w2));
+    /*
+     * When the NVP is HW controlled, more fields are updated
+     */
+    if (xive2_nvp_is_hw(nvp)) {
+        g_string_append_printf(buf, " CPPR:%02x",
+                               xive_get_field32(NVP2_W2_CPPR, nvp->w2));
+        if (xive2_nvp_is_co(nvp)) {
+            g_string_append_printf(buf, " CO:%04x",
+                                   xive_get_field32(NVP2_W1_CO_THRID, nvp->w1));
+        }
+    }
+    g_string_append_c(buf, '\n');
+}
+
 static void xive2_end_enqueue(Xive2End *end, uint32_t data)
 {
     uint64_t qaddr_base = xive2_end_qaddr(end);
-- 
2.43.0



  parent reply	other threads:[~2024-07-24 21:23 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-24 21:21 [PATCH v4 00/11] XIVE changes for Cache Watch, VSTs, STT and info pic Michael Kowal
2024-07-24 21:21 ` [PATCH v4 01/11] pnv/xive2: XIVE2 Cache Watch, Cache Flush and Sync Injection support Michael Kowal
2024-07-24 21:21 ` [PATCH v4 02/11] pnv/xive2: Structure/define alignment changes Michael Kowal
2024-07-24 21:21 ` [PATCH v4 03/11] pnv/xive: Support cache flush and queue sync inject with notifications Michael Kowal
2024-07-24 21:21 ` [PATCH v4 04/11] pnv/xive2: Add NVG and NVC to cache watch facility Michael Kowal
2024-08-02  1:41   ` Nicholas Piggin
2024-07-24 21:21 ` [PATCH v4 05/11] pnv/xive2: Configure Virtualization Structure Tables through the PC Michael Kowal
2024-07-24 21:21 ` [PATCH v4 06/11] pnv/xive2: Enable VST NVG and NVC index compression Michael Kowal
2024-07-24 21:21 ` [PATCH v4 07/11] pnv/xive2: Set Translation Table for the NVC port space Michael Kowal
2024-07-24 21:21 ` [PATCH v4 08/11] pnv/xive2: Fail VST entry address computation if table has no VSD Michael Kowal
2024-07-24 21:21 ` Michael Kowal [this message]
2024-07-25  8:04   ` [PATCH v4 09/11] pnv/xive2: Move xive2_nvp_pic_print_info() to xive2.c Cédric Le Goater
2024-07-24 21:21 ` [PATCH v4 10/11] pnv/xive2: Refine TIMA 'info pic' output Michael Kowal
2024-07-25  8:02   ` Cédric Le Goater
2024-07-24 21:21 ` [PATCH v4 11/11] pnv/xive2: Dump more END state with 'info pic' Michael Kowal
2024-07-25  8:02   ` Cédric Le Goater

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