From: Michael Kowal <kowal@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com,
npiggin@gmail.com, milesg@linux.ibm.com
Subject: [PATCH v4 02/11] pnv/xive2: Structure/define alignment changes
Date: Wed, 24 Jul 2024 16:21:21 -0500 [thread overview]
Message-ID: <20240724212130.26811-3-kowal@linux.ibm.com> (raw)
In-Reply-To: <20240724212130.26811-1-kowal@linux.ibm.com>
From: Michael Kowal <kowal@linux.vnet.ibm.com>
Made changes to some structure and define elements to ease review in
next patchset.
Signed-off-by: Michael Kowal <kowal@linux.vnet.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
---
hw/intc/pnv_xive2.c | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index af9ab68fc6..08b6da78fb 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -45,16 +45,16 @@ typedef struct XiveVstInfo {
static const XiveVstInfo vst_infos[] = {
- [VST_EAS] = { "EAT", sizeof(Xive2Eas), 16 },
- [VST_ESB] = { "ESB", 1, 16 },
- [VST_END] = { "ENDT", sizeof(Xive2End), 16 },
+ [VST_EAS] = { "EAT", sizeof(Xive2Eas), 16 },
+ [VST_ESB] = { "ESB", 1, 16 },
+ [VST_END] = { "ENDT", sizeof(Xive2End), 16 },
- [VST_NVP] = { "NVPT", sizeof(Xive2Nvp), 16 },
- [VST_NVG] = { "NVGT", sizeof(Xive2Nvgc), 16 },
- [VST_NVC] = { "NVCT", sizeof(Xive2Nvgc), 16 },
+ [VST_NVP] = { "NVPT", sizeof(Xive2Nvp), 16 },
+ [VST_NVG] = { "NVGT", sizeof(Xive2Nvgc), 16 },
+ [VST_NVC] = { "NVCT", sizeof(Xive2Nvgc), 16 },
- [VST_IC] = { "IC", 1 /* ? */ , 16 }, /* Topology # */
- [VST_SYNC] = { "SYNC", 1 /* ? */ , 16 }, /* Topology # */
+ [VST_IC] = { "IC", 1, /* ? */ 16 }, /* Topology # */
+ [VST_SYNC] = { "SYNC", 1, /* ? */ 16 }, /* Topology # */
/*
* This table contains the backing store pages for the interrupt
@@ -1720,13 +1720,13 @@ static const MemoryRegionOps pnv_xive2_ic_lsi_ops = {
/*
* Sync MMIO page (write only)
*/
-#define PNV_XIVE2_SYNC_IPI 0x000
-#define PNV_XIVE2_SYNC_HW 0x080
-#define PNV_XIVE2_SYNC_NxC 0x100
-#define PNV_XIVE2_SYNC_INT 0x180
-#define PNV_XIVE2_SYNC_OS_ESC 0x200
-#define PNV_XIVE2_SYNC_POOL_ESC 0x280
-#define PNV_XIVE2_SYNC_HARD_ESC 0x300
+#define PNV_XIVE2_SYNC_IPI 0x000
+#define PNV_XIVE2_SYNC_HW 0x080
+#define PNV_XIVE2_SYNC_NxC 0x100
+#define PNV_XIVE2_SYNC_INT 0x180
+#define PNV_XIVE2_SYNC_OS_ESC 0x200
+#define PNV_XIVE2_SYNC_POOL_ESC 0x280
+#define PNV_XIVE2_SYNC_HARD_ESC 0x300
static uint64_t pnv_xive2_ic_sync_read(void *opaque, hwaddr offset,
unsigned size)
--
2.43.0
next prev parent reply other threads:[~2024-07-24 21:23 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-24 21:21 [PATCH v4 00/11] XIVE changes for Cache Watch, VSTs, STT and info pic Michael Kowal
2024-07-24 21:21 ` [PATCH v4 01/11] pnv/xive2: XIVE2 Cache Watch, Cache Flush and Sync Injection support Michael Kowal
2024-07-24 21:21 ` Michael Kowal [this message]
2024-07-24 21:21 ` [PATCH v4 03/11] pnv/xive: Support cache flush and queue sync inject with notifications Michael Kowal
2024-07-24 21:21 ` [PATCH v4 04/11] pnv/xive2: Add NVG and NVC to cache watch facility Michael Kowal
2024-08-02 1:41 ` Nicholas Piggin
2024-07-24 21:21 ` [PATCH v4 05/11] pnv/xive2: Configure Virtualization Structure Tables through the PC Michael Kowal
2024-07-24 21:21 ` [PATCH v4 06/11] pnv/xive2: Enable VST NVG and NVC index compression Michael Kowal
2024-07-24 21:21 ` [PATCH v4 07/11] pnv/xive2: Set Translation Table for the NVC port space Michael Kowal
2024-07-24 21:21 ` [PATCH v4 08/11] pnv/xive2: Fail VST entry address computation if table has no VSD Michael Kowal
2024-07-24 21:21 ` [PATCH v4 09/11] pnv/xive2: Move xive2_nvp_pic_print_info() to xive2.c Michael Kowal
2024-07-25 8:04 ` Cédric Le Goater
2024-07-24 21:21 ` [PATCH v4 10/11] pnv/xive2: Refine TIMA 'info pic' output Michael Kowal
2024-07-25 8:02 ` Cédric Le Goater
2024-07-24 21:21 ` [PATCH v4 11/11] pnv/xive2: Dump more END state with 'info pic' Michael Kowal
2024-07-25 8:02 ` Cédric Le Goater
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