From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Nicholas Piggin" <npiggin@gmail.com>,
qemu-ppc@nongnu.org, "Cédric Le Goater" <clg@redhat.com>
Subject: [PULL 28/96] ppc/pnv: Add allow for big-core differences in DT generation
Date: Fri, 26 Jul 2024 09:53:01 +1000 [thread overview]
Message-ID: <20240725235410.451624-29-npiggin@gmail.com> (raw)
In-Reply-To: <20240725235410.451624-1-npiggin@gmail.com>
device-tree building needs to account for big-core mode, because it is
driven by qemu cores (small cores). Every second core should be skipped,
and every core should describe threads for both small-cores that make
up the big core.
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/ppc/pnv.c | 43 +++++++++++++++++++++++++++++++++++--------
1 file changed, 35 insertions(+), 8 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 07a29411a6..a1c2cbbc3f 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -141,9 +141,9 @@ static int pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt)
CPUPPCState *env = &cpu->env;
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
PnvChipClass *pnv_cc = PNV_CHIP_GET_CLASS(chip);
- g_autofree uint32_t *servers_prop = g_new(uint32_t, smt_threads);
+ uint32_t *servers_prop;
int i;
- uint32_t pir;
+ uint32_t pir, tir;
uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
0xffffffff, 0xffffffff};
uint32_t tbfreq = PNV_TIMEBASE_FREQ;
@@ -154,7 +154,10 @@ static int pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt)
char *nodename;
int cpus_offset = get_cpus_node(fdt);
- pnv_cc->get_pir_tir(chip, pc->hwid, 0, &pir, NULL);
+ pnv_cc->get_pir_tir(chip, pc->hwid, 0, &pir, &tir);
+
+ /* Only one DT node per (big) core */
+ g_assert(tir == 0);
nodename = g_strdup_printf("%s@%x", dc->fw_name, pir);
offset = fdt_add_subnode(fdt, cpus_offset, nodename);
@@ -235,12 +238,28 @@ static int pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt)
}
/* Build interrupt servers properties */
- for (i = 0; i < smt_threads; i++) {
- pnv_cc->get_pir_tir(chip, pc->hwid, i, &pir, NULL);
- servers_prop[i] = cpu_to_be32(pir);
+ if (pc->big_core) {
+ servers_prop = g_new(uint32_t, smt_threads * 2);
+ for (i = 0; i < smt_threads; i++) {
+ pnv_cc->get_pir_tir(chip, pc->hwid, i, &pir, NULL);
+ servers_prop[i * 2] = cpu_to_be32(pir);
+
+ pnv_cc->get_pir_tir(chip, pc->hwid + 1, i, &pir, NULL);
+ servers_prop[i * 2 + 1] = cpu_to_be32(pir);
+ }
+ _FDT((fdt_setprop(fdt, offset, "ibm,ppc-interrupt-server#s",
+ servers_prop, sizeof(*servers_prop) * smt_threads
+ * 2)));
+ } else {
+ servers_prop = g_new(uint32_t, smt_threads);
+ for (i = 0; i < smt_threads; i++) {
+ pnv_cc->get_pir_tir(chip, pc->hwid, i, &pir, NULL);
+ servers_prop[i] = cpu_to_be32(pir);
+ }
+ _FDT((fdt_setprop(fdt, offset, "ibm,ppc-interrupt-server#s",
+ servers_prop, sizeof(*servers_prop) * smt_threads)));
}
- _FDT((fdt_setprop(fdt, offset, "ibm,ppc-interrupt-server#s",
- servers_prop, sizeof(*servers_prop) * smt_threads)));
+ g_free(servers_prop);
return offset;
}
@@ -389,6 +408,10 @@ static void pnv_chip_power9_dt_populate(PnvChip *chip, void *fdt)
_FDT((fdt_setprop(fdt, offset, "ibm,pa-features",
pa_features_300, sizeof(pa_features_300))));
+
+ if (pnv_core->big_core) {
+ i++; /* Big-core groups two QEMU cores */
+ }
}
if (chip->ram_size) {
@@ -450,6 +473,10 @@ static void pnv_chip_power10_dt_populate(PnvChip *chip, void *fdt)
_FDT((fdt_setprop(fdt, offset, "ibm,pa-features",
pa_features_31, sizeof(pa_features_31))));
+
+ if (pnv_core->big_core) {
+ i++; /* Big-core groups two QEMU cores */
+ }
}
if (chip->ram_size) {
--
2.45.2
next prev parent reply other threads:[~2024-07-25 23:59 UTC|newest]
Thread overview: 111+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-25 23:52 [PULL 00/96] ppc-for-9.1-2 queue Nicholas Piggin
2024-07-25 23:52 ` [PULL 01/96] tests/tcg: Skip failing ppc64 multi-threaded tests Nicholas Piggin
2024-07-25 23:52 ` [PULL 02/96] spapr: Migrate ail-mode-3 spapr cap Nicholas Piggin
2024-08-27 20:51 ` Michael Tokarev
2024-07-25 23:52 ` [PULL 03/96] spapr: Free stdout path Nicholas Piggin
2024-07-25 23:52 ` [PULL 04/96] ppc/vof: Fix unaligned FDT property access Nicholas Piggin
2024-07-25 23:52 ` [PULL 05/96] accel/kvm: Introduce kvm_create_and_park_vcpu() helper Nicholas Piggin
2024-07-25 23:52 ` [PULL 06/96] cpu-common.c: export cpu_get_free_index to be reused later Nicholas Piggin
2024-07-25 23:52 ` [PULL 07/96] target/ppc: handle vcpu hotplug failure gracefully Nicholas Piggin
2024-07-25 23:52 ` [PULL 08/96] target/ppc/arch_dump: set prstatus pid to cpuid Nicholas Piggin
2024-07-25 23:52 ` [PULL 09/96] linux-header: PPC: KVM: Update one-reg ids for DEXCR, HASHKEYR and HASHPKEYR Nicholas Piggin
2024-07-25 23:52 ` [PULL 10/96] target/ppc/cpu_init: Synchronize DEXCR with KVM for migration Nicholas Piggin
2024-07-25 23:52 ` [PULL 11/96] target/ppc/cpu_init: Synchronize HASHKEYR " Nicholas Piggin
2024-07-25 23:52 ` [PULL 12/96] target/ppc/cpu_init: Synchronize HASHPKEYR " Nicholas Piggin
2024-07-25 23:52 ` [PULL 13/96] ppc/pnv: Update Power10's cfam id to use Power10 DD2 Nicholas Piggin
2024-07-25 23:52 ` [PULL 14/96] ppc/pnv: Fix loss of LPC SERIRQ interrupts Nicholas Piggin
2024-07-25 23:52 ` [PULL 15/96] ppc/pnv: Implement POWER9 LPC PSI serirq outputs and auto-clear function Nicholas Piggin
2024-07-29 10:10 ` Cédric Le Goater
2024-11-05 17:35 ` Peter Maydell
2024-11-07 14:18 ` Peter Maydell
2024-11-08 2:18 ` Nicholas Piggin
2024-07-25 23:52 ` [PULL 16/96] ppc/pnv: Begin a more complete ADU LPC model for POWER9/10 Nicholas Piggin
2024-07-25 23:52 ` [PULL 17/96] ppc/pnv: Implement ADU access to LPC space Nicholas Piggin
2024-07-29 10:24 ` Cédric Le Goater
2024-07-25 23:52 ` [PULL 18/96] target/ppc: Fix msgsnd for POWER8 Nicholas Piggin
2024-07-25 23:52 ` [PULL 19/96] ppc/pnv: Add pointer from PnvCPUState to PnvCore Nicholas Piggin
2024-07-25 23:52 ` [PULL 20/96] ppc/pnv: Move timebase state into PnvCore Nicholas Piggin
2024-07-25 23:52 ` [PULL 21/96] target/ppc: Move SPR indirect registers " Nicholas Piggin
2024-07-25 23:52 ` [PULL 22/96] ppc/pnv: use class attribute to limit SMT threads for different machines Nicholas Piggin
2024-07-25 23:52 ` [PULL 23/96] ppc/pnv: Extend chip_pir class method to TIR as well Nicholas Piggin
2024-07-25 23:52 ` [PULL 24/96] ppc: Add a core_index to CPUPPCState for SMT vCPUs Nicholas Piggin
2024-07-25 23:52 ` [PULL 25/96] target/ppc: Add helpers to check for SMT sibling threads Nicholas Piggin
2024-07-25 23:52 ` [PULL 26/96] ppc: Add has_smt_siblings property to CPUPPCState Nicholas Piggin
2024-07-25 23:53 ` [PULL 27/96] ppc/pnv: Add a big-core mode that joins two regular cores Nicholas Piggin
2024-07-25 23:53 ` Nicholas Piggin [this message]
2024-07-25 23:53 ` [PULL 29/96] ppc/pnv: Implement big-core PVR for Power9/10 Nicholas Piggin
2024-07-25 23:53 ` [PULL 30/96] ppc/pnv: Implement Power9 CPU core thread state indirect register Nicholas Piggin
2024-07-25 23:53 ` [PULL 31/96] ppc/pnv: Add POWER10 ChipTOD quirk for big-core Nicholas Piggin
2024-07-25 23:53 ` [PULL 32/96] ppc/pnv: Add big-core machine property Nicholas Piggin
2024-07-25 23:53 ` [PULL 33/96] ppc/pnv: Add a CPU nmi and resume function Nicholas Piggin
2024-07-25 23:53 ` [PULL 34/96] ppc/pnv: Implement POWER10 PC xscom registers for direct controls Nicholas Piggin
2024-07-25 23:53 ` [PULL 35/96] ppc/pnv: Add an LPAR per core machine option Nicholas Piggin
2024-07-25 23:53 ` [PULL 36/96] ppc/pnv: Remove ppc target dependency from pnv_xscom.h Nicholas Piggin
2024-07-25 23:53 ` [PULL 37/96] hw/ssi: Add SPI model Nicholas Piggin
2024-07-25 23:53 ` [PULL 38/96] hw/ssi: Extend " Nicholas Piggin
2024-07-29 10:32 ` Cédric Le Goater
2024-07-29 13:16 ` Peter Maydell
2024-07-29 16:39 ` Chalapathi V
2024-07-29 12:08 ` Cédric Le Goater
2024-07-29 16:23 ` Chalapathi V
2024-07-25 23:53 ` [PULL 39/96] hw/block: Add Microchip's 25CSM04 to m25p80 Nicholas Piggin
2024-07-25 23:53 ` [PULL 40/96] hw/ppc: SPI controller wiring to P10 chip Nicholas Piggin
2024-07-25 23:53 ` [PULL 41/96] tests/qtest: Add pnv-spi-seeprom qtest Nicholas Piggin
2024-07-25 23:53 ` [PULL 42/96] pnv/xive2: XIVE2 Cache Watch, Cache Flush and Sync Injection support Nicholas Piggin
2024-07-25 23:53 ` [PULL 43/96] pnv/xive2: Structure/define alignment changes Nicholas Piggin
2024-07-25 23:53 ` [PULL 44/96] pnv/xive: Support cache flush and queue sync inject with notifications Nicholas Piggin
2024-07-25 23:53 ` [PULL 45/96] pnv/xive2: Add NVG and NVC to cache watch facility Nicholas Piggin
2024-07-25 23:53 ` [PULL 46/96] pnv/xive2: Configure Virtualization Structure Tables through the PC Nicholas Piggin
2024-07-25 23:53 ` [PULL 47/96] pnv/xive2: Enable VST NVG and NVC index compression Nicholas Piggin
2024-07-25 23:53 ` [PULL 48/96] pnv/xive2: Set Translation Table for the NVC port space Nicholas Piggin
2024-07-25 23:53 ` [PULL 49/96] pnv/xive2: Fail VST entry address computation if table has no VSD Nicholas Piggin
2024-07-25 23:53 ` [PULL 50/96] pnv/xive2: Move xive2_nvp_pic_print_info() to xive2.c Nicholas Piggin
2024-07-25 23:53 ` [PULL 51/96] pnv/xive2: Refine TIMA 'info pic' output Nicholas Piggin
2024-07-25 23:53 ` [PULL 52/96] pnv/xive2: Dump more END state with 'info pic' Nicholas Piggin
2024-07-25 23:53 ` [PULL 53/96] target/ppc: Move VMX integer add/sub saturate insns to decodetree Nicholas Piggin
2024-07-25 23:53 ` [PULL 54/96] target/ppc: Improve VMX integer add/sub saturate instructions Nicholas Piggin
2024-07-25 23:53 ` [PULL 55/96] target/ppc: Move ISA300 flag check out of do_helper_XX3 Nicholas Piggin
2024-07-25 23:53 ` [PULL 56/96] target/ppc: Move VSX arithmetic and max/min insns to decodetree Nicholas Piggin
2024-07-25 23:53 ` [PULL 57/96] target/ppc: Move VSX logical instructions " Nicholas Piggin
2024-07-25 23:53 ` [PULL 58/96] target/ppc: Moving VSX scalar storage access insns " Nicholas Piggin
2024-07-25 23:53 ` [PULL 59/96] target/ppc: Move VSX vector with length " Nicholas Piggin
2024-07-25 23:53 ` [PULL 60/96] target/ppc: Move VSX vector " Nicholas Piggin
2024-07-25 23:53 ` [PULL 61/96] target/ppc: Move VSX fp compare " Nicholas Piggin
2024-07-25 23:53 ` [PULL 62/96] target/ppc: Move get/set_avr64 functions to vmx-impl.c.inc Nicholas Piggin
2024-07-25 23:53 ` [PULL 63/96] target/ppc: Update VMX storage access insns to use tcg_gen_qemu_ld/st_i128 Nicholas Piggin
2024-07-25 23:53 ` [PULL 64/96] target/ppc : Update VSX storage access insns to use tcg_gen_qemu _ld/st_i128 Nicholas Piggin
2024-07-25 23:53 ` [PULL 65/96] target/ppc: Reorganise and rename ppc_hash32_pp_prot() Nicholas Piggin
2024-07-25 23:53 ` [PULL 66/96] target/ppc/mmu_common.c: Remove local name for a constant Nicholas Piggin
2024-07-25 23:53 ` [PULL 67/96] target/ppc/mmu_common.c: Remove single use local variable Nicholas Piggin
2024-07-25 23:53 ` [PULL 68/96] " Nicholas Piggin
2024-07-25 23:53 ` [PULL 69/96] target/ppc/mmu_common.c: Remove another " Nicholas Piggin
2024-07-25 23:53 ` [PULL 70/96] target/ppc/mmu_common.c: Remove yet " Nicholas Piggin
2024-07-25 23:53 ` [PULL 71/96] target/ppc/mmu_common.c: Return directly in ppc6xx_tlb_pte_check() Nicholas Piggin
2024-07-25 23:53 ` [PULL 72/96] target/ppc/mmu_common.c: Simplify ppc6xx_tlb_pte_check() Nicholas Piggin
2024-07-25 23:53 ` [PULL 73/96] target/ppc/mmu_common.c: Remove unused field from mmu_ctx_t Nicholas Piggin
2024-07-25 23:53 ` [PULL 74/96] target/ppc/mmu_common.c: Remove hash " Nicholas Piggin
2024-07-25 23:53 ` [PULL 75/96] target/ppc/mmu_common.c: Remove pte_update_flags() Nicholas Piggin
2024-07-25 23:53 ` [PULL 76/96] target/ppc/mmu_common.c: Remove nx field from mmu_ctx_t Nicholas Piggin
2024-07-25 23:53 ` [PULL 77/96] target/ppc/mmu_common.c: Convert local variable to bool Nicholas Piggin
2024-07-25 23:53 ` [PULL 78/96] target/ppc/mmu_common.c: Remove single use local variable Nicholas Piggin
2024-07-25 23:53 ` [PULL 79/96] target/ppc/mmu_common.c: Simplify a switch statement Nicholas Piggin
2024-07-25 23:53 ` [PULL 80/96] target/ppc/mmu_common.c: Inline and remove ppc6xx_tlb_pte_check() Nicholas Piggin
2024-07-25 23:53 ` [PULL 81/96] target/ppc/mmu_common.c: Remove ptem field from mmu_ctx_t Nicholas Piggin
2024-07-25 23:53 ` [PULL 82/96] target/ppc: Add function to get protection key for hash32 MMU Nicholas Piggin
2024-07-25 23:53 ` [PULL 83/96] target/ppc/mmu-hash32.c: Inline and remove ppc_hash32_pte_prot() Nicholas Piggin
2024-07-25 23:53 ` [PULL 84/96] target/ppc/mmu_common.c: Init variable in function that relies on it Nicholas Piggin
2024-07-25 23:53 ` [PULL 85/96] target/ppc/mmu_common.c: Remove key field from mmu_ctx_t Nicholas Piggin
2024-07-25 23:53 ` [PULL 86/96] target/ppc/mmu_common.c: Stop using ctx in ppc6xx_tlb_check() Nicholas Piggin
2024-07-25 23:54 ` [PULL 87/96] target/ppc/mmu_common.c: Rename function parameter Nicholas Piggin
2024-07-25 23:54 ` [PULL 88/96] target/ppc/mmu_common.c: Use defines instead of numeric constants Nicholas Piggin
2024-07-25 23:54 ` [PULL 89/96] target/ppc: Remove bat_size_prot() Nicholas Piggin
2024-07-25 23:54 ` [PULL 90/96] target/ppc/mmu_common.c: Stop using ctx in get_bat_6xx_tlb() Nicholas Piggin
2024-07-25 23:54 ` [PULL 91/96] target/ppc/mmu_common.c: Remove mmu_ctx_t Nicholas Piggin
2024-07-25 23:54 ` [PULL 92/96] target/ppc/mmu-hash32.c: Inline and remove ppc_hash32_pte_raddr() Nicholas Piggin
2024-07-25 23:54 ` [PULL 93/96] target/ppc/mmu-hash32.c: Move get_pteg_offset32() to the header Nicholas Piggin
2024-07-25 23:54 ` [PULL 94/96] target/ppc: Unexport some functions from mmu-book3s-v3.h Nicholas Piggin
2024-07-25 23:54 ` [PULL 95/96] target/ppc/mmu-radix64: Remove externally unused parts from header Nicholas Piggin
2024-07-25 23:54 ` [PULL 96/96] target/ppc: Remove includes from mmu-book3s-v3.h Nicholas Piggin
2024-07-27 6:57 ` [PULL 00/96] ppc-for-9.1-2 queue Richard Henderson
2024-07-29 9:43 ` Philippe Mathieu-Daudé
2024-07-31 7:12 ` Nicholas Piggin
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