From: Andrew Jones <ajones@ventanamicro.com>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: Jason Chien <jason.chien@sifive.com>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com,
zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
frank.chang@sifive.com, tjeznach@rivosinc.com
Subject: Re: [PATCH v5 11/13] hw/riscv/riscv-iommu: Add another irq for mrif notifications
Date: Wed, 31 Jul 2024 18:50:53 +0200 [thread overview]
Message-ID: <20240731-30c03698cd1c889a4485e2b0@orel> (raw)
In-Reply-To: <49fe48d5-42d0-46fc-899e-50960941c3a2@ventanamicro.com>
On Wed, Jul 31, 2024 at 01:27:09PM GMT, Daniel Henrique Barboza wrote:
> Hi Jason,
>
>
> On 7/23/24 12:25 PM, Jason Chien wrote:
> > Hi Daniel,
> >
> > On 2024/7/9 上午 01:34, Daniel Henrique Barboza wrote:
> > > From: Andrew Jones <ajones@ventanamicro.com>
> > >
> > > And add mrif notification trace.
> > >
> > > Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
> > > Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> > > Reviewed-by: Frank Chang <frank.chang@sifive.com>
> > > ---
> > > hw/riscv/riscv-iommu-pci.c | 2 +-
> > > hw/riscv/riscv-iommu.c | 1 +
> > > hw/riscv/trace-events | 1 +
> > > 3 files changed, 3 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/hw/riscv/riscv-iommu-pci.c b/hw/riscv/riscv-iommu-pci.c
> > > index 7b82ce0645..d7e5f20885 100644
> > > --- a/hw/riscv/riscv-iommu-pci.c
> > > +++ b/hw/riscv/riscv-iommu-pci.c
> > > @@ -81,7 +81,7 @@ static void riscv_iommu_pci_realize(PCIDevice *dev, Error **errp)
> > > pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
> > > PCI_BASE_ADDRESS_MEM_TYPE_64, &s->bar0);
> > > - int ret = msix_init(dev, RISCV_IOMMU_INTR_COUNT,
> > > + int ret = msix_init(dev, RISCV_IOMMU_INTR_COUNT + 1,
> > The new interrupt is not marked as used with msix_vector_use().
>
> I took at look at what this patch is actually doing and, at least in the MRIF setup
> I have, it's not doing much because we're not hitting the MRIF path inside the
> emulation. So we're not hitting the trace and this extra MSI isn't being used.
>
> Drew is taking a look into it in the kernel side. Until we get a better idea on what's
> happening I'll remove this patch from the series. We can re-introduce it again later
> in this series or in the follow-up.
I recommend adding the trace to whatever patch introduces the MRIF path in
this series since we'll want the trace for testing regardless. If we need
another fix to this series for MRIFs then I'll post that separately on
top.
Thanks,
drew
next prev parent reply other threads:[~2024-07-31 16:51 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-08 17:34 [PATCH v5 00/13] riscv: QEMU RISC-V IOMMU Support Daniel Henrique Barboza
2024-07-08 17:34 ` [PATCH v5 01/13] exec/memtxattr: add process identifier to the transaction attributes Daniel Henrique Barboza
2024-07-08 17:34 ` [PATCH v5 02/13] hw/riscv: add riscv-iommu-bits.h Daniel Henrique Barboza
2024-07-08 17:34 ` [PATCH v5 03/13] hw/riscv: add RISC-V IOMMU base emulation Daniel Henrique Barboza
2024-07-18 4:37 ` Alistair Francis
2024-07-25 12:57 ` Daniel Henrique Barboza
2024-07-08 17:34 ` [PATCH v5 04/13] pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device Daniel Henrique Barboza
2024-07-08 17:34 ` [PATCH v5 05/13] hw/riscv: add riscv-iommu-pci reference device Daniel Henrique Barboza
2024-07-18 4:42 ` Alistair Francis
2024-07-18 7:06 ` Jason Chien
2024-07-24 21:39 ` Daniel Henrique Barboza
2024-07-08 17:34 ` [PATCH v5 06/13] hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug Daniel Henrique Barboza
2024-07-08 17:34 ` [PATCH v5 07/13] test/qtest: add riscv-iommu-pci tests Daniel Henrique Barboza
2024-07-08 17:34 ` [PATCH v5 08/13] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC) Daniel Henrique Barboza
2024-07-18 4:50 ` Alistair Francis
2024-07-08 17:34 ` [PATCH v5 09/13] hw/riscv/riscv-iommu: add ATS support Daniel Henrique Barboza
2024-07-19 3:43 ` Alistair Francis
2024-07-08 17:34 ` [PATCH v5 10/13] hw/riscv/riscv-iommu: add DBG support Daniel Henrique Barboza
2024-07-08 17:34 ` [PATCH v5 11/13] hw/riscv/riscv-iommu: Add another irq for mrif notifications Daniel Henrique Barboza
2024-07-23 15:25 ` Jason Chien
2024-07-31 16:27 ` Daniel Henrique Barboza
2024-07-31 16:50 ` Andrew Jones [this message]
2024-07-31 17:21 ` Daniel Henrique Barboza
2024-07-08 17:34 ` [PATCH v5 12/13] qtest/riscv-iommu-test: add init queues test Daniel Henrique Barboza
2024-07-19 9:32 ` Alistair Francis
2024-07-08 17:35 ` [PATCH v5 13/13] docs/specs: add riscv-iommu Daniel Henrique Barboza
2024-07-19 9:34 ` Alistair Francis
2024-07-24 12:56 ` Daniel Henrique Barboza
2024-07-25 3:41 ` Alistair Francis
2024-07-31 19:17 ` Daniel Henrique Barboza
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