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From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Marcelo Tosatti <mtosatti@redhat.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com
Subject: [PATCH 9/9] i386/cpu: Make invtsc migratable when user sets tsc-khz explicitly
Date: Wed, 14 Aug 2024 03:54:31 -0400	[thread overview]
Message-ID: <20240814075431.339209-10-xiaoyao.li@intel.com> (raw)
In-Reply-To: <20240814075431.339209-1-xiaoyao.li@intel.com>

When user sets tsc-frequency explicitly, the invtsc feature is actually
migratable because the tsc-frequency is supposed to be fixed during the
migration.

See commit d99569d9d856 ("kvm: Allow invtsc migration if tsc-khz
is set explicitly") for referrence.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
 target/i386/cpu.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 85ce405ece80..fb3519fc6836 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1865,9 +1865,10 @@ static inline uint64_t x86_cpu_xsave_xss_components(X86CPU *cpu)
  * Returns the set of feature flags that are supported and migratable by
  * QEMU, for a given FeatureWord.
  */
-static uint64_t x86_cpu_get_migratable_flags(FeatureWord w)
+static uint64_t x86_cpu_get_migratable_flags(X86CPU *cpu, FeatureWord w)
 {
     FeatureWordInfo *wi = &feature_word_info[w];
+    CPUX86State *env = &cpu->env;
     uint64_t r = 0;
     int i;
 
@@ -1881,6 +1882,12 @@ static uint64_t x86_cpu_get_migratable_flags(FeatureWord w)
             r |= f;
         }
     }
+
+    /* when tsc-khz is set explicitly, invtsc is migratable */
+    if ((w == FEAT_8000_0007_EDX) && env->user_tsc_khz) {
+        r |= CPUID_APM_INVTSC;
+    }
+
     return r;
 }
 
@@ -6129,7 +6136,7 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w)
 
     r &= ~unavail;
     if (cpu && cpu->migratable) {
-        r &= x86_cpu_get_migratable_flags(w);
+        r &= x86_cpu_get_migratable_flags(cpu, w);
     }
     return r;
 }
-- 
2.34.1



      parent reply	other threads:[~2024-08-14  8:04 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-14  7:54 [PATCH 0/9] Misc patches for x86 CPUID Xiaoyao Li
2024-08-14  7:54 ` [PATCH 1/9] i386/cpu: Don't construct a all-zero entry for CPUID[0xD 0x3f] Xiaoyao Li
2024-08-14  7:54 ` [PATCH 2/9] i386/cpu: Enable fdp-excptn-only and zero-fcs-fds Xiaoyao Li
2024-08-14  7:54 ` [PATCH 3/9] i386/cpu: Add support for bits in CPUID.7_2.EDX Xiaoyao Li
2024-08-14  7:54 ` [PATCH 4/9] i386/cpu: Construct valid CPUID leaf 5 iff CPUID_EXT_MONITOR Xiaoyao Li
2024-08-14  7:54 ` [PATCH 5/9] i386/cpu: Construct CPUID 2 as stateful iff times > 1 Xiaoyao Li
2024-08-14  7:54 ` [PATCH 6/9] i386/cpu: Set topology info in 0x80000008.ECX only for AMD CPUs Xiaoyao Li
2024-08-14 11:47   ` Chenyi Qiang
2024-08-14  7:54 ` [PATCH 7/9] i386/cpu: Suppress CPUID values not defined by Intel Xiaoyao Li
2024-08-14  7:54 ` [PATCH 8/9] i386/cpu: Drop AMD alias bits in FEAT_8000_0001_EDX for non-AMD guests Xiaoyao Li
2024-08-14  7:54 ` Xiaoyao Li [this message]

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