From: Sebastian Huber <sebastian.huber@embedded-brains.de>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH] hw/arm/xilinx_zynq: Enable Security Extensions
Date: Wed, 28 Aug 2024 02:50:19 +0200 [thread overview]
Message-ID: <20240828005019.57705-1-sebastian.huber@embedded-brains.de> (raw)
The system supports the Security Extensions (core and GIC). This change is
necessary to run tests which pass on the real hardware.
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
---
hw/arm/xilinx_zynq.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 3c56b9abe1..37c234f5ab 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -219,14 +219,6 @@ static void zynq_init(MachineState *machine)
for (n = 0; n < smp_cpus; n++) {
Object *cpuobj = object_new(machine->cpu_type);
- /*
- * By default A9 CPUs have EL3 enabled. This board does not currently
- * support EL3 so the CPU EL3 property is disabled before realization.
- */
- if (object_property_find(cpuobj, "has_el3")) {
- object_property_set_bool(cpuobj, "has_el3", false, &error_fatal);
- }
-
object_property_set_int(cpuobj, "midr", ZYNQ_BOARD_MIDR,
&error_fatal);
object_property_set_int(cpuobj, "reset-cbar", MPCORE_PERIPHBASE,
--
2.35.3
next reply other threads:[~2024-08-28 0:51 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-28 0:50 Sebastian Huber [this message]
2024-08-29 12:50 ` [PATCH] hw/arm/xilinx_zynq: Enable Security Extensions Peter Maydell
2024-08-29 13:31 ` Sebastian Huber
2024-08-30 8:05 ` Edgar E. Iglesias
2024-09-03 16:37 ` Peter Maydell
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