From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
bmeng@tinylab.org, liwei1518@gmail.com,
zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
ajones@ventanamicro.com, tjeznach@rivosinc.com,
Frank Chang <frank.chang@sifive.com>,
Jason Chien <jason.chien@sifive.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH v7 01/12] exec/memtxattr: add process identifier to the transaction attributes
Date: Tue, 3 Sep 2024 17:16:20 -0300 [thread overview]
Message-ID: <20240903201633.93182-2-dbarboza@ventanamicro.com> (raw)
In-Reply-To: <20240903201633.93182-1-dbarboza@ventanamicro.com>
From: Tomasz Jeznach <tjeznach@rivosinc.com>
Extend memory transaction attributes with process identifier to allow
per-request address translation logic to use requester_id / process_id
to identify memory mapping (e.g. enabling IOMMU w/ PASID translations).
Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Jason Chien <jason.chien@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
include/exec/memattrs.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
index 14cdd8d582..e27c18f3dc 100644
--- a/include/exec/memattrs.h
+++ b/include/exec/memattrs.h
@@ -52,6 +52,11 @@ typedef struct MemTxAttrs {
unsigned int memory:1;
/* Requester ID (for MSI for example) */
unsigned int requester_id:16;
+
+ /*
+ * PID (PCI PASID) support: Limited to 8 bits process identifier.
+ */
+ unsigned int pid:8;
} MemTxAttrs;
/* Bus masters which don't specify any attributes will get this,
--
2.45.2
next prev parent reply other threads:[~2024-09-03 20:19 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-03 20:16 [PATCH v7 00/12] riscv: QEMU RISC-V IOMMU Support Daniel Henrique Barboza
2024-09-03 20:16 ` Daniel Henrique Barboza [this message]
2024-09-03 20:31 ` [PATCH v7 01/12] exec/memtxattr: add process identifier to the transaction attributes Richard Henderson
2024-09-03 20:59 ` Daniel Henrique Barboza
2024-09-03 20:16 ` [PATCH v7 02/12] hw/riscv: add riscv-iommu-bits.h Daniel Henrique Barboza
2024-09-03 20:16 ` [PATCH v7 03/12] hw/riscv: add RISC-V IOMMU base emulation Daniel Henrique Barboza
2024-09-03 20:16 ` [PATCH v7 04/12] pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device Daniel Henrique Barboza
2024-09-03 20:16 ` [PATCH v7 05/12] hw/riscv: add riscv-iommu-pci reference device Daniel Henrique Barboza
2024-09-03 20:16 ` [PATCH v7 06/12] hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug Daniel Henrique Barboza
2024-09-03 20:16 ` [PATCH v7 07/12] test/qtest: add riscv-iommu-pci tests Daniel Henrique Barboza
2024-09-03 20:16 ` [PATCH v7 08/12] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC) Daniel Henrique Barboza
2024-09-03 20:16 ` [PATCH v7 09/12] hw/riscv/riscv-iommu: add ATS support Daniel Henrique Barboza
2024-09-03 20:16 ` [PATCH v7 10/12] hw/riscv/riscv-iommu: add DBG support Daniel Henrique Barboza
2024-09-03 20:16 ` [PATCH v7 11/12] qtest/riscv-iommu-test: add init queues test Daniel Henrique Barboza
2024-09-03 20:16 ` [PATCH v7 12/12] docs/specs: add riscv-iommu Daniel Henrique Barboza
2024-09-06 5:21 ` [PATCH v7 00/12] riscv: QEMU RISC-V IOMMU Support Alistair Francis
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